All-Digital, High-Efficiency Data Throughput Solution Delivers Additional Power Savings FREMONT, Calif. -- Oct 28, 2008
-- Virage Logic Corporation (NASDAQ:VIRL), the semiconductor industry's trusted intellectual property (IP) partner, today announced that Movidia, the mobile video processor company, has selected Virage Logic's Intelli(TM) low-power double data rate (LPDDR) memory interface IP for its low-power designs. Virage Logic's high-efficiency LPDDR solution delivers optimal performance at the power and area required for Movidia's advanced mobile video applications. Leveraging a high-efficiency controller with a uniquely all-digital PHY+DLL, the Intelli LPDDR interface IP solution is based on the LPDDR SDRAM Specification, JEDEC JESD209 (August 2007), and extends beyond it to deliver lower-power, reduced-area and higher-reliability designs that are crucial for success in today's high-volume consumer and mobile electronics markets.
"We selected Virage Logic's Intelli LPDDR interface IP solution not only because it meets all JEDEC requirements for low power, but its advanced controller architecture delivers high-efficiency data throughput that helps to further reduce system power," said David Moloney, chief technology officer, Movidia. "In addition, the AMBA specification-compliant, high-efficiency Intelli LPDDR controller enabled our designs to meet the bandwidth requirements at lower frequencies."
"Movidia's selection of Virage Logic's Intelli LPDDR for their platform video and multimedia processors is a clear example of how a highly differentiated solution can provide a competitive advantage. The portable and uniquely architected all-digital PHY+DLL offers more signal margin in a compact design, resulting in lower system costs through lower power consumption and bill of materials cost," said Kamalesh Ruparel, vice president and general manager of Virage Logic's Application Specific IP (ASIP) business. "Movidia's advanced low-power video processor will, for the first time, enable powerful User Generated Content (UGC) video production functions for mobile phones and other consumer electronics products, and we are very pleased that our Intelli LPDDR solution enables this critical functionality." About Virage Logic's Intelli LPDDR Solution
Virage Logic's Intelli LPDDR solution, in addition to meeting the JEDEC LPDDR specification, addresses the needs for low-power memory interface IP in a broad range of mobile applications, including video, graphics and other low-power portable applications. With its standard cell architecture and all-digital implementation, Intelli LPDDR integrates seamlessly with digital SoC design flows and enables easy portability to any process node or foundry for maximum flexibility. With a strategic investment in developing low-power IP solutions, Virage Logic's scalable architectures provide the basis for the next-generation offerings such as the Intelli LPDDR2 -- which will address the requirements for next-generation higher performance and lower-power applications. About Virage Logic's System Aware IP(TM) Solutions
To help systems designers address the challenges of the environment -- SoC core to interface, interface to package, package to board, and other SoCs -- including the impact on the system behavior and performance, Virage Logic introduced System Aware IP. The company's System Aware IP offering -- comprising Intelli DDR, Intelli PHY+DLL, and Intelli Models -- is designed to mitigate any impact the environment may have on the overall system to ensure performance and functionality requirements are met. The Intelli DDR memory interface product family offers the highest-performance, lowest-latency intelligent memory controllers for DDR1, DDR2, and DDR3; the lowest-power, highest-bandwidth Mobile SDR, Mobile DDR and Low-Power DDR (LPDDR) memory controllers; full-featured Graphics DDR (GDDR) memory controllers; high-speed, full-digital DDR SDRAM PHY+DLL solutions and memory models for popular DRAM parts. The Intelli PHY+DLL companion for the Intelli DDR memory interface products is a full-digital DDR SDRAM PHY+DLL hard macro GDSII solution optimized for high-frequency operation as well as small die size. Virage Logic's Intelli Models provide flexible, easy-to-use, vendor-independent simulation models for popular DRAM devices that enable designers to verify the functionality of an entire memory sub-system. About Virage Logic
Virage Logic is a leading provider of semiconductor intellectual property (IP) for the design of complex integrated circuits. The company's highly differentiated product portfolio includes embedded SRAMs, embedded NVMs, embedded test and repair, logic libraries, memory development software, and DDR memory controller subsystems. As the industry's trusted semiconductor IP partner, foundries, IDMs and fabless customers rely on Virage Logic to achieve higher performance, lower power, higher density and optimal yield, as well as shorten time-to-market and time-to-volume. For further information, visit www.viragelogic.com