English
Mentor Graphics Broadens Support of OVM Compliant Verification IP for IEEE802.3-2005 Gigabit Ethernet-based Designs
WILSONVILLE, Ore. -- Oct. 30, 2008 - Mentor Graphics Corporation (Nasdaq: MENT), today announced that its unique verification IP solution, the Questa® Multi-view Verification Component (MVC) library, has been extended to support the IEEE802.3-2005 Gigabit Ethernet standard.
Using Questa MVCs, electronic systems companies can reduce the development effort for verification environments required to validate and verify System-on-Chip (SoC) designs integrating high-speed Gigabit networking. All applications that require high bandwidth delivered by 10Gigabit Ethernet products, including high-performance computing grids and server virtualization and internet protocol television, benefit from using the Questa MVC solution. 10M/100M and 1Gigabit applications are also supported by the Questa MVC solution.
The complexity of today’s SoC verification environments often require designers to spend valuable time building, validating and verifying multiple and usually incompatible Gigabit Ethernet verification IP to support system-level, TLM-level and RTL-level verification. This lack of consistency prevents teams from easily moving between abstraction levels and maximizing verification effectiveness. By leveraging support for critical industry standards such as IEEE802.3-2005 Gigabit Ethernet, SystemVerilog and the Open Verification Methodology (OVM) with the MVC’s unique multi- view technology, designers can connect any level of abstraction from system to gate; integrated causality debug and analysis between abstractions; and compatibility with the Questa Verification Management solution – ensures consistent model behavior, fast error resolution and gives the verification team more options to improve performance and increase coverage.
The Questa Functional Verification Platform - The Recognized Leading Solution for SystemVerilog
The Questa functional verification platform delivers the most comprehensive verification and management solution in the industry with support for all standard design and verification languages. Integrating all capabilities required for advanced functional verification of System-On-Chip (SoC) designs including constraint-solving, assertion checking, functional coverage, silicon-effects for low power and RTL/TLM debugging. In addition, the Questa platform is extended with Questa Multi-View Verification Components (MVC), Questa assertions and monitors Verification Library (QVL), the Open Verification Methodology (OVM), Questa Codelink™, and Questa Verification Management (VM), allowing the Questa platform to deliver a significant reduction in effort, cost and time for the validation and verification of the most demanding SoC designs.
About Mentor Graphics
Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $850 million and employs approximately 4,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
Using Questa MVCs, electronic systems companies can reduce the development effort for verification environments required to validate and verify System-on-Chip (SoC) designs integrating high-speed Gigabit networking. All applications that require high bandwidth delivered by 10Gigabit Ethernet products, including high-performance computing grids and server virtualization and internet protocol television, benefit from using the Questa MVC solution. 10M/100M and 1Gigabit applications are also supported by the Questa MVC solution.
The complexity of today’s SoC verification environments often require designers to spend valuable time building, validating and verifying multiple and usually incompatible Gigabit Ethernet verification IP to support system-level, TLM-level and RTL-level verification. This lack of consistency prevents teams from easily moving between abstraction levels and maximizing verification effectiveness. By leveraging support for critical industry standards such as IEEE802.3-2005 Gigabit Ethernet, SystemVerilog and the Open Verification Methodology (OVM) with the MVC’s unique multi- view technology, designers can connect any level of abstraction from system to gate; integrated causality debug and analysis between abstractions; and compatibility with the Questa Verification Management solution – ensures consistent model behavior, fast error resolution and gives the verification team more options to improve performance and increase coverage.
The Questa Functional Verification Platform - The Recognized Leading Solution for SystemVerilog
The Questa functional verification platform delivers the most comprehensive verification and management solution in the industry with support for all standard design and verification languages. Integrating all capabilities required for advanced functional verification of System-On-Chip (SoC) designs including constraint-solving, assertion checking, functional coverage, silicon-effects for low power and RTL/TLM debugging. In addition, the Questa platform is extended with Questa Multi-View Verification Components (MVC), Questa assertions and monitors Verification Library (QVL), the Open Verification Methodology (OVM), Questa Codelink™, and Questa Verification Management (VM), allowing the Questa platform to deliver a significant reduction in effort, cost and time for the validation and verification of the most demanding SoC designs.
About Mentor Graphics
Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world’s most successful electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of about $850 million and employs approximately 4,500 people worldwide. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.
|
||||||
Related News
- New Software for Mentor Graphics Questa Platform Enables Early Verification of IEEE 1149.1-2013 Compliant IP and On-Chip Instruments
- Mentor Graphics Releases 0-In CDC Version 3.0 to Support Verification Needs of Larger, More Complex Designs
- Mentor Graphics Offers Co-Verification Model Support for ARCtangent User-Customizable RISC/DSP Designs
- IEEE Standards Association Announces IEEE 802.3 Projects to Meet Industry Demands for Higher Ethernet Speeds
- Imagination and Mentor Graphics collaborate to speed verification of MIPS-based designs with Veloce and Codelink
Breaking News
- Omni Design Technologies Joins Intel Foundry Accelerator IP Alliance
- Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
- TSMC Reports First Quarter EPS of NT$8.70
- Brisbane Silicon publishes DPTx 1.4 IP Core
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
Most Popular
- U.S. Subsidy for TSMC Has AI Chips, Tech Leadership in Sight
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
- Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass Production
- Silvaco Announces Expanded Partnership with Micron Technology
- OPENEDGES Unveils ENLIGHT Pro: A High-Performance NPU IP Quadrupling its Previous Generation's Performance
|
E-mail This Article | 
|
|
Printer-Friendly Page |