CAMPBELL, Calif. -- November 3, 2008 -- Silicon Interfaces, a high-end design services and leading provider for IPs in Europe, North America and Asia-Pacific, under their IP Development Program - Silicon Cores: Core to the Intelligent Systems™, announces the availability of VMM based USB 2.0 SystemVerilog Verification IP. The VMM based VIP is the latest addition to the portfolio of Silicon Interfaces Verification IPs which is the de facto standard for architecting robust, powerful and productive verification environments for complex electronic systems, systems-on-chips (SoCs) and IP.
The USB 2.0 VMM System Verilog VIP is fully documented, off the shelf component for the verification of the USB 2.0 compliant Function Controller and can work in a standalone mode. The USB2.0 VIP is developed using SystemVerilog test benches based on VMM methodology using coverage-driven, constrained-random and assertion-based techniques. This type of Verification framework allows for easy "plug-and-play" use and specifies library building blocks for creating interoperable verification components.
The VIPs Layered SystemVerilog test bench architecture approach enhances design re-usability, provides abstraction at higher levels and enables concurrent development of various verification environment pieces. The USB 2.0 VIP provides a fast and accurate way to simplify and speed-up the Device verification task, thus providing a compelling cost and time to market.
Please visit http://www.siliconinterfaces.com/AssetsUSB2.0VMM.htm for more information.
Silicon Interfaces’ USB 2.0 function controller is a highly integrated solution for USB applications. This core provides 480 Mb/s high speeds USB interface and is a single core solution incorporating USB 2.0 protocol operating in Link Layer of Open System Interconnect (OSI) which significantly reduces the time and cost of implementing complex USB 2.0 target system designs.
- Fully VMM complaint and completely compatible with SystemVerilog Environment.
- Object-oriented, Reusable, Modular VMM based SystemVerilog Components.
- VMM based Stimulus Generator that provides Hierarchical Seed Randomization and Constrained Driven Randomization of Packets.
- VMM based transactions using monitors, checkers and scoreboards.
- VMM based Functional Coverage model that measures original design specification.
- The VIP can work with either 8 bit or 16 bit standard USB 2.0 Devices and supports variable USB2.0 speed modes.
- Built-In Error Injection Mechanism and Customized SUSPEND and / or RESET operation through use of simple macros
- Programmable and Randomized Data Transfer Types, namely INTERRUPT, ISOCHRONOUS, BULK and CONTROL
For a complete listing of features and pricing of USB 2.0 VMM System Verilog VIP, visit the Silicon Cores web site at www.siliconcores.com
The VMM based USB 2.0 SystemVerilog VIP is available now.
About Silicon Interfaces
Silicon Interfaces offers Designs Services by Onsite Contract Consulting, Offshore Projects, Virtual Development Services (VDC) as well as many silicon optimized IPs across multiple domain such as Networking, Data Communications, Interconnect, Embedded and Storage, primarily in the areas of System Verilog/Verilog/VHDL/SystemC for Design, Modeling and Verification of complex SoC, ASIC and FPGAs. We offer extensive Verification Programs based on SystemVerilog, E Language, Vera, Verilog and VHDL, wherein we have developed e Verification Components, OVAs, Verification IP and Verification Test Benches. For more information, please visit www.siliconinterfaces.com
Since July 2001, Silicon Interfaces promoted an IP Development Program - Silicon Cores: Core to the Intelligent SystemsTM. We have IPs such as Bluetooth Baseband, 802.11 a/b/g MAC & Baseband, Gigabit Ethernet MAC, Sonet STS 1/3 Framer, 1394, USB2 Function Controller, USB On-the-Go, Infiniband, Rapid IO, 8530, 8051, 7990 and UART. The company offers Verification IP solutions using industry standard methodologies. More information available at www.siliconcores.com