While virtually every chip maker, IP developer, and semiconductor foundry today has staked a claim in the emerging system-on-a-chip market, within 10 years a mere handful of players may dot the landscape.
According to analysts and industry executives attending the recent Dataquest Semiconductors '99 conference in Palm Springs, Calif., the cost of creating differentiated devices that are relevant across a broad application base-or even a large niche-will bring about dramatic changes in the next decade.
Manufacturing economics will overshadow Moore's Law and bring the SOC ideal down to a wider, more attainable system-level integration (SLI) reality, according to Dataquest Inc. analyst Clark Fuhs.
"System-on-a-chip economics fall apart below 0.2 micron," Fuhs said. With the cost of mask sets escalating at deep-submicron geometries, "the [application-specific] SOC model has to evolve to a large-volume, standard-product model in some way, shape, or form."
One solution is to design programmability into the chip, and several ASIC and processor suppliers are already exploring this idea. Within five years, an emerging category Dataquest has dubbed application-specific programmable products (ASPPs) will spell the end of the PLD market as we know it, asserted analyst Jordan Selburn.
"Despite the increasing importance of time-to-market and flexibility, programmable SOCs will never become a reality," Selburn said. By 2005, the PLD market will have peaked, and ASPP revenue will soar to $50 billion by 2010, he added.
A more immediate answer to the SLI question, according to Fuhs, is multiple-chip packaging (MCP), in which several chips are integrated on a single substrate using a chip-scale package design. "MCP will enable optimizing production of system elements for the process," Fuhs said. "For example, standard logic can be done at 0.5 micron, while the high-value part of the chip can be done in high-volume 0.18 micron."
Though today SLI re presents only 7% of the total semiconductor market, San Jose-based Dataquest projects it will grow to 20% in five years, accounting for 40% of the total market by 2010, with ASSPs beginning to outstrip ASICs in revenue by next year.
To executives attending the Dataquest conference, it was clear that the availability of reusable IP cores will be the linchpin in any SLI strategy. According to Dataquest's 10-year forecast, 95% of typical SLI chips in production will consist of predesigned IP and embedded memory-most of it supplied by third-party vendors.
Yet only a few independent IP suppliers will be highly successful, and the top five semiconductor suppliers will deliver 75% of all IP, analysts predict.
While the foundry model as a delivery mechanism for IP has sparked debate about the disintegration of the ASIC model, some industry executives pointed to the weakness of the alternative.
"In the market today, there are not a lot of IP suppliers with a lot of relevance," said Bruce Entin, vice president of worldwide marketing for LSI Logic Corp., Milpitas, Calif. "The EDA industry itself is struggling to come up with end-to-end solutions, while also trying to come up with point solutions."
Analysts agreed that within a few years the SLI market will fall to a handful of integrated-device manufacturers, foundries, and contract assemblers.
"To be competitive, a company will have to have leading-edge chip design, manufacturing, and packaging at its disposal, which is becoming an increasingly tall order," Fuhs said.