Sigma Designs Employs Sidense Memory in IPTV Product
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation (Oct. 17, 2017)
Ease of process and foundry portability a key factor in choosing Sidense OTP macrosOttawa, Canada – January 6, 2009 – Sidense, a leading developer of Logic Non-Volatile Memory (LNVM) IP cores, today announced that Sigma Designs (NASDAQ: SIGM), a leader in digital media processor SoCs for consumer electronics, has selected Sidense’s one-time programmable (OTP) memory IP for their future chipset products. Sidense’s flexible SiPROM architecture allows Sigma to securely embed HDCP keys as well as boot code in their next-generation internet protocol television (IPTV) SoCs.
“We designed our 1T-Fuse OTP architecture to minimize implementation effort when porting chips between foundries or to advanced process nodes,” said Xerxes Wania, President and CEO of Sidense. “This provides our customers with a high level of foundry and process node flexibility, resulting in faster time to market and cost reduction when changing processes.”
Sigma’s media processors integrate a wide complement of advanced capabilities for a system-on-chip (SoC) solution with powerful multimedia processing, a robust content security system, multiple on-chip CPUs, and a range of on-chip system peripherals. Sigma’s upcoming range of SoCs will feature on-chip OTP memory to provide increased security and configurability for future set-top box oriented solutions.
“Selling to the consumer market, it is essential for us to have the flexibility to offer a variety of on-chip content security options while being able to change nodes and processes at our discretion,” said Ken Lowe, vice president of strategic marketing. “We found that Sidense was the only NVM provider that had such a wide range of foundry and advanced node coverage.”
About Sidense
Sidense, listed on EE Times 60 Emerging Startups list for 2008, provides secure, dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes, with no additional masks or process steps required. Sidense's patented one-transistor 1T-Fuse™ architecture (U.S. Patent #7402855 and others) provides the industry’s smallest footprint and lowest power Logic Non-Volatile Memory (NVM) solution.
Sidense OTP memory is available at 180nm, 130nm, 90nm and 65nm and scalable to 45nm and below. The IP is available at UMC, TSMC, SMIC, Tower and Chartered. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, visit www.sidense.com.
About Sigma Designs, Inc.
Sigma Designs is a leading fabless provider of highly integrated system-on-chip, or SoC, solutions that are used to deliver multimedia entertainment throughout the home. Sigma’s SoC solutions combine its semiconductors and software and are a critical component of multiple high-growth, consumer applications that process digital video and audio content, including internet protocol TV, or IPTV, high definition DVD players, high definition TVs, or HDTVs, and portable media players.
Headquartered in Milpitas, Calif., Sigma Designs also has sales representatives in the United States, Belgium, China, Japan and Taiwan and sells its products through a third-party distributor in Korea. For more information, please visit Sigma Designs’ web site at www.sigmadesigns.com.
|
Related News
- Sidense OTP Helps Novatek Provide Customers with Cost-Effective and Reliable Display Drivers
- Sidense Advanced Process Node 1T-OTP to be used in Sigma Designs DTV Products
- Sidense OTP Helps Richtek Technology Give Customers Cost-Effective and Efficient Power Management Solutions
- Sidense Announces SHF 1T-OTP Non-Volatile Memory IP for Advanced Process Chip Designs
- Sidense Completes TSMC IP9000 Assessment for SiPROM NVM IP and Attains more than 70 Customer Licenses in the Last 12 Months
Breaking News
- MIPI Alliance Announces OEM, Expanded Ecosystem Support for MIPI A-PHY Automotive SerDes Specification
- Deeptech Keysom completes a €4M fundraising and deploys the first “no-code” tool dedicated to the design of tailor-made processors
- LDRA Announces Extended Support for RISC-V High Assurance Software Quality Tool Suite to Accelerate On-Target Testing of Critical Embedded Applications
- Faraday and Kiwimoore Succeed in 2.5D Packaging Project for Mass Production
- Secure-IC unveils its Securyzr™ neo Core Platform at Embedded World North America 2024
Most Popular
- RaiderChip brings Meta Llama 3.2 LLM HW acceleration to low cost FPGAs
- Bluetooth® V6.0 Channel Sounding RF Transceiver IP Core in 22nm & 40nm for ultra-low power distance aware Bluetooth connected devices
- Electronic System Design Industry Posts $4.7 Billion in Revenue in Q2 2024, ESD Alliance Reports
- Secure-IC unveils its Securyzr™ neo Core Platform at Embedded World North America 2024
- OPENEDGES Technology Achieves ISO 26262 ASIL-B Certification
E-mail This Article | Printer-Friendly Page |