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High Bandwidth Memory 3 (HBM3/3E) IP optimized for Samsung SF4X
Video: USB 3.0 and power tool at DesignCon
Rick Merritt, EE Times
(02/04/2009 1:35 AM EST)
SANTA CLARA, Calif. — Silicon blocks for the emerging USB 3.0 interface and software tools to ease the job of power integrity design grabbed my attention on the show floor at DesignCon.
Stephane Hauradou, co-founder and chief technology officer of PLDA Inc., gave me a demo of his USB 3.0 block running in an FPGA with throughput of about 3.5 Gbits/s.
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