February 5, 2009 - The Intellectual Property (IP) provider - Digital Core Design has announced the release of a new - DLIN - Master/Slave Controller IP Core.
The DLIN Master/Slave IP core is fully compatible to Local Interconnect Network (LIN) LIN 1.3 and LIN 2.1 industry standards. DLIN core provides an interface between a microprocessor/microcontroller and LIN bus. LIN has been created to decrease costs of automotive networks, and replace more expensive CAN in simple application (sensors or actuators). The DLIN is a technology independent VHDL or VERILOG design that can be implemented in a variety of process technologies and can be fully customized accordingly to customer needs.
DLIN is delivered with fully automated testbench and complete set of tests allowing easy package validation at each stage of SoC design flow. Customer can select VHDL, VERILOG HDL Source code, and FPGA Netlists depending on what is preferred. Core is licensed under Single Site or Multi-Sites options. For further details please contact DCD.
For more information please check DCD web site.
About Digital Core Design
DCD is a private Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house, an expert in IP cores architecture improvements. DCD sells its products and services directly and through its global distribution network. DCD offers VHDL and Verilog high performance and synthesizable IP cores for a speed optimized 8-, 16- and 32-bit processors, peripherals, serial interfaces, floating point arithmetic units and coprocessors. The functionality of IP solutions offered by DCD were up to date appreciated by over 200 licenses sold to over 150 customers worldwide, such as: INTEL, SIEMENS, PHILIPS, TOYOTA, MAXIM, RAYTHEON, OSRAM, GENERAL ELECTRIC, FARADAY, SAGEM, FLEXTRONICS and GOODRICH. DCD also became a member of first-class branch partner programs as: AMPP of ALTERA, AllianceCORE of XILINX, ispLeverCORE Connection of LATTICE and IP Catalyst of SYNOPSYS. For more information, please visit: www.dcd.pl.