Viewpoint: Consolidation is all about timing
EETimes Europe (02/18/2009 12:42 PM EST)
It's time to shift the thought paradigm from "What fabs do I have today, and how do I fill them?" to "What fab base do I need five years from now and how do I get there?"
An ad campaign a few years ago posed a clear strategy choice: Whether to be wolf or sheep? Most semiconductor companies face a similar decision today: be active in market consolidation or risk being swallowed. Portfolios of half-empty fabs burning cash reduce strategic options and can threaten an IDM’s existence.
Many consolidation strategies are bound to fail. One example is entering the foundry business when the number of underutilized fabs is growing and overall demand is absent. Succeeding in the foundry business requires far more than simply offering fab capacity. Transferring products to other fabs takes too long to achieve a significant impact, if begun under pressure.
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |
|
Related News
- Viewpoint: Is semiconductor industry consolidation inevitable?
- Realtek Deploys Cadence Tempus Timing Solution to Deliver Working Silicon on N12 Design
- True Circuits Attends 60th Design Automation Conference, Celebrates 25 Years of Timing Excellence
- Tachyum Closes DDR5 Timing at over 6400MT/s Providing Massive Bandwidth for Prodigy Chip
- AMD and Xilinx Provide Update Regarding Expected Timing of Acquisition Close
Breaking News
- Weebit Nano Q3 FY25 Quarterly Activities Report
- Codasip launches complete exploration platform to accelerate CHERI adoption
- VSORA Raises $46 Million to Bring World's Most Powerful AI Inference Chip to Market
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
Most Popular
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- CFX 0.13μm eFuse OTP IP has been applied in the mass production of over 15,000 CMOS image sensors
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications