Intelop announces customization services for their TCP-Offload Engine SoC IP for customers to target specific protocol implementation or differentiated features
Santa Clara, California – Mar 2, 2009 -- Intelop Corporation, a leading high end IP developer, customization & electronic engineering design services provider, today announced addition of value added customization services to their TCP offload engine SoC solutions that are integrated with ARP hardware module, G Bit Ethernet MAC and AMBA 2.0 bus interfaces running at 2 Gbps sustained rates. There are hundreds of layer 3, 4, 5 protocols which run on various networks throughout the globe, some of these may need accelerated, e.g. UDP, IGMP, TFTP or FTP. It is the only TOE engine that does it and integrates so many other functions in hardware. All of connection, packet transfer, disconnection, session management overhead which traditionally is performed by TCP/IP software is accomplished by this TOE. It is a new paradigm and new level of integration in networking hardware acceleration. It implements control plane and data plane processing of TCP/IP in hardware that are 10 – 20 times faster than TCP/IP software stack.
Because of its advanced scalable architecture, it can be customized to implement differentiated features and performance requirements to meet customer’s specifications e.g. misc. protocol processing and monitoring at G-bit line rate, in addition to TCP/IP, ARP module, number of simultaneous connections, TCP/IP performance tuning based upon type of network/traffic and application usage, scalable packet FIFO size, scalable size of Session Management table, Session Parameters, scalable size of direct store Packet memories, integrated DDR/SSRAM controllers, choice of PHY interface - XGMII or Serial and more.
This Integrated TOE SoC silicon IP with customizable features provides enhanced functionality in all networking equipment including; Layer-2-5 Switches/Routers, IPS/IDS appliances and Network Security appliances, Severs and high end NICs. Advanced architecture with built in scalability allows customers to target it to many silicon libraries from FPGAs to 0.18 um-0.090 nm ASIC or SOC without compromising performance or functionality.
“We utilized our expertise in designing highly successful and advanced technology Multi-Giga bit Enterprise-class IDS/IPS, Network Security appliances employing SOCs also designed by intelop in defining the architecture of this TOE engine,” said K Masood. Intelop also integrated many of their IPs with other standard IPs in SOCs/FPGAs and developed necessary software as a total turn key solutions for their customers.
“We are excited about this new crown jewel and the ability to develop value-added networking silicon and total solutions for our customers.” said Kevin Moore of Intelop.
Intelop Corporation is a custom IP developer, SoC/ASIC/FPGA integrator and engineering services provider for Networking, Network Security, storage and Embedded Systems. They offer silicon proven semiconductor IP and services with comprehensive hardware and software experience.
|
Related News
- Intelop announces a new Development platform based on Xilinx V5 FPGA for their TCP-Offload Engine SoC IP for customers to easily develop networking applications
- Intelop announces industry's first customizable TCP-Offload Engine at 2-Gpbs with integrated Ethernet MAC Silicon IP for SOC, ASIC and FPGA customers in Network equipment, Network Security, Telecom, SAN/NAS markets
- Intelop announces Xilinx FPGA development platform for their TCP-Offload Engine SoC IP
- Intelop announces major enhancements to their TCP-Offload Engine SoC IP that has integrated GEMAC, ARP module and AMBA 2.0 bus and PCIe interface running at 2-Gbps also is capable of managing thousands of simultaneous TCP sessions in realtime
- Intelop announces major enhancements to their TCP-Offload Engine SoC IP that also has integrated GEMAC, ARP module and AMBA 2.0 bus and PCIe interface running at 2-Gbps capable of managing thousands of simultaneous TCP sessions
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |