130nm FTP Non Volatile Memory for Standard CMOS Logic Process
Massana trots out 200 mips DSP core G.lite chip
Massana trots out 200 mips DSP core, G.lite chip
By Darrell Dunn, EBN
October 6, 1999 (3:18 p.m. EST)
URL: http://www.eetimes.com/story/OEG19991006S0045
San Jose -- Massana Inc., a three-year old DSP technology company, has unveiled a licensable DSP coprocessor that provides 200 mips performance. The company introduced the FILU-200 series of DSP coprocessor cores on Wednesday at the Microprocessor Forum here. The FILU-200 is a performance improvement over the company's existing FILU-50 core, which provides 50 mips performance. Massana is also offering the FILU-200 derivative called FILU-DMT, which enables implementation of the G.lite standard for xDSL modems. The Massana coprocessors are designed to handle DSP-intensive functions when combined with any standard RISC processor, said Brian Murray, vice president of engineering for the company. The FILU-200 separates the control and signal flow by implementing signal processing on a dedicated DSP engine and the control on the RISC processor, thereby "hiding" the complexity often associated with using DSPs, Murray said. The FILU-200 inte grates dual ALU and dual MAC execution units, has been licensed to two unnamed companies and is currently being integrated into an SOC design, Murray said. Founded in Dublin, Ireland, in 1996, Massana is in the process of relocating its headquarters to Campbell, Calif. The company said it will retain its primary design efforts in Dublin.
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