Design & Reuse

Complete SoC development environment now available at OpenCores

July 17, 2008 -- OpenCores is pleased to announce the release of a solution aimed at lowering the technical threshold of development with the open-source OpenRISC processor.

There will always be barriers to overcome when changing to a different processor architecture. OpenCores now offers its flagship LGPL licensed 32-bit RISC processor along with a pre-configured design environment to make these problems easier to solve. Using a virtual machine pre-configured with the necessary tools, it is now even simpler to start integrating proprietary IP, or license-fee free IP from OpenCores, with the world's most used open-source processor, the OpenRISC 1200.

OpenCores has made available a "Virtual Ubuntu Linux" installation which installs and configures a VMWare virtual machine. It includes all of the tools necessary to start hardware and software development on a OpenRISC platform.

It provides an OpenRISC SoC reference design along with the following development tools:
  • Icarus Verilog simulator
  • GTKWave waveform viewer
  • Software tool-chain based on gcc-4.2.2 with uClibc-0.9.29
  • Support for Busybox-1.7.5 and Linux-2.6.19
  • The OpenRISC architectural simulator
This package provides simplicity, ease of use, and is a great leap forward for developers who decide to base their designs on OpenCores IP.