March 2, 2026 -
By Jake Hertz, AllAboutCircuits.com
The company attended ISSCC with some big automotive announcements: a new approach to chiplet-based processing and a configurable 3-nm memory architecture.
At ISSCC 2026, Renesas announced a slew of new technologies for automotive SoCs, including three new SoC technologies for automotive multi-domain electronic control units (ECUs) in software-defined vehicle (SDV) architectures and a configurable 3-nm ternary content-addressable memory (TCAM) architecture designed for automotive SoCs.
The releases provide insight into Renesas’s vision for the future—with a common thread of centralized compute, heterogeneous integration, and memory architectures optimized for performance and ISO 26262 compliance
Chiplet Architectures for Multi-Domain Automotive ECUs
Renesas’s first announcement at ISSCC revealed three SoC technologies intended for high-performance automotive multi-domain ECUs. These chips must simultaneously execute heterogeneous workloads while maintaining ASIL D compliance across increasingly complex silicon.