March 23, 2026 -
Under the C2S initiative, India has made significant progress in its 10-year target of training 85,000 engineers in semiconductor design.
Under the Chips to Startups (C2S) initiative of India Semiconductor Mission (ISM), India has made significant progress during the first four years of its 10-year target of training 85,000 engineers in semiconductor design. This, according to Ashwini Vaishnaw, Union Minister for Railways, Information & Broadcasting, and Electronics & IT.
Vaishnaw said that world-class electronic design automation (EDA) tools being supported by Synopsys Inc., Cadence Design Systems Inc., Siemens, Renesas Electronics Corp., Ansys and AMD have been made available in 315 academic institutions across the country. With the help of these tools, students are getting practical experience on designing semiconductor chips. These chips are being fabricated and tested at the Semiconductor Laboratory (SCL), Mohali, giving students hands-on experience across the entire process from design to fabrication, packaging, and testing. This initiative has evolved into the world’s largest open-access EDA program, with over 1.85 crore hours of EDA tool usage recorded for chip design training so far, and continuing to grow.