Full debugging features at the lowest silicon cost with Dolphin Integration 16-bit microcontroller thanks to the innovative Virtual Clone
Its extremely low-cost Virtual Clone debugger is now proposed with the Flip80251 Typhoon, the new generation of 8051 upward compatible 16-bit microcontroller core.
The Virtual Clone package consists in a simple USB to JTAG adaptor which links a popular Software Development Kit running on a PC with the FPGA or the SoC embedding the 16-bit Flip80251 Typhoon and its unique “Processor Open Clone”, the POC peripheral.
“The POC squeezes into the SoC such a small silicon area, less than 0.012 mm2 at 0.18 µm,” explains Aurélie DESCOMBES, Product Manager for Microcontrollers at Dolphin, “that emulation and debugging features can be maintained inside without impacting its fabrication cost.”
In the case of a mixed signal SoC, such a flexibility is appraised by developers of software application: they can debug their program in the real SoC environment, i.e. with all analog peripherals active.
SoC integrators looking for a powerful and low-power core truly increasing the competitiveness of their SoC, can now benefit from a double chance: ultra small silicon area with a full and powerful set of debugging features.
For more data on the Virtual Clone and the set of debugging features, click here or contact Aurélie Descombes: logic@dolphin.fr
|
Dolphin Semiconductor Hot IP
Related News
- BIRD Owl, the new real-time debugging solution for the 16-bit microcontrollers, from Dolphin Integration
- Minimizing BoM cost and silicon area thanks to Dolphin Integration's iLR-LaDiable capless regulator
- Dolphin Integration: The first 16-bit MCU core 8051 upward compatible, achieving 0.4 DMIPS/MHz
- Dolphin Integration helps reducing BoM cost of IoT circuits thanks to a Panoply of Over Voltage regulators
- Shorter Time-To-Market thanks to the innovative SmartVision IDE from Dolphin Integration
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |