Voltage Monitor with Digital Output (Multi-domain supply monitoring), TSMC N3E
MAZeT offers Interbus-IP for customized FPGA and ASIC implementation
In customized applications, it is often required to directly integrate this interface into the FPGA or ASIC. For cases such as these, MAZeT offers interested customers the IPs and the implementation support. If the customer so requests, then MAZeT can undertake the complete design of the ASIC, FPGA or module - including production. MAZeT has many years of extensive experience in the implementation of Interbus protocol-IPs. A modified version of the Interbus-IP has been also used in non-industrial applications. One example is a safety-relevant communication system to transfer voice traffic in which the modified Interbus has proven itself to be successful for many years now.
Product Information
Click here
About MAZeT
MAZeT GmbH is a leading European development and production service provider. The company, founded in 1992 with headquarters in Jena, develops, manufactures and delivers customer-specific electronic modular units, software and ASICs, and markets its own products under the name JENCOLORTM worldwide. Due to its broad technological offerings and application know-how, MAZeT GmbH is a dependable and proven service partner for made-to-measure, customer-specific solutions in the areas of industrial electronics and optical sensors. The company's development competence and the components produced by it for special uses can be found in the whole area of industrial measurement technology, control engineering, automation and medical areas, among others. For more information please see http://www.mazet.de/.
|
Related News
- iSine Inc. Releases Extreme ECC(tm) for NAND Flash SOC's optimized for ASIC and Xilinx FPGA implementation
- MAZeT offers EnDat-IP for customized applications
- Cybertek Solution Wins Multiple Contracts in Asia
- Bitech Technologies Reports Completion of Its FPGA design and the Launch of Its ASIC Initiatives for Bitcoin Mining
- Introducing superfast serial interfacing with JESD204B Tx - Rx PHY IP Cores in 12nm, 28nm and 40nm for all type of ADC/DAC and ASIC/FPGA connections
Breaking News
- Omni Design Technologies Joins Intel Foundry Accelerator IP Alliance
- Efabless Announces the Release of the OpenLane 2 Development Platform, Transforming Custom Silicon Design Flows
- TSMC Reports First Quarter EPS of NT$8.70
- Brisbane Silicon publishes DPTx 1.4 IP Core
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
Most Popular
- U.S. Subsidy for TSMC Has AI Chips, Tech Leadership in Sight
- Cadence Unveils Palladium Z3 and Protium X3 Systems to Usher in a New Era of Accelerated Verification, Software Development and Digital Twins
- Zhuhai Chuangfeixin: OTP IP Based on 90nm CMOS Image Sensor Process Technology Successfully Mass Production
- Silvaco Announces Expanded Partnership with Micron Technology
- OPENEDGES Unveils ENLIGHT Pro: A High-Performance NPU IP Quadrupling its Previous Generation's Performance
E-mail This Article | Printer-Friendly Page |