Enables better FPGA-based OLT reference designs and multi-channel integration into ASICs for higher throughput and cost reductionSAN JOSE, Calif., March 23, 2009
-- K-micro (Kawasaki Microelectronics America, Inc.), a leader in advanced ASICs, announced a new burst mode CDR SerDes PHY for GPON OLT applications. Available in a 172-pin LBGA package, this device can lock to upstream data burst at 1.244 Gb/s in less than 20 bits. Using its transmit and receive parallel ports in TTL I/Os, the new SerDes is ideally suited for development of FPGA-based OLT reference designs. It is also available for multi-channel integration into ASICs for higher throughput and cost reduction. In addition, the CDR SerDes can be configured to improve burst mode lock time in OLT solutions for EPON standards operating at 1.25 Gb/s.
"GPON standards developed for FTTX applications typically specify system performance only at the PMD device," said Vijay Pathak, CTO at K-micro. "This, coupled with impairments incurred along the long optical path between the ONT and OLT, presents steep challenges for data and clock recovery at the OLT end. For a link to work, optics and electrical components must co-exist, and jitter budgets must be met. Realizing that there is a variety of optical transceivers in the market to satisfy cost, power dissipation and physical size constraints, K-micro developed a flexible burst mode CDR to provide a wider selection of optical transceivers to system designers."
The CDR SerDes can be operated in two modes - i) automatic mode, where the CDR observation window is set to a fixed duration, and ii) manual mode, where total flexibility is offered to tailor the solution according to optical transceiver characteristics and other system latencies. In both cases the CDR has a high jitter tolerance of 0.75 UI in burst mode operation, enabling it to be used with large variety of optical transceivers. Outside the burst mode operation, the CDR works in continuous mode where it can tolerate even higher jitter.
One important distinction between the two modes of operation is that in automatic mode, burst is identified by a clock-like pattern typically seen in a pre-amble of data burst, whereas in manual mode, the placement and duration of burst period is controlled by the user. With this flexibility, manual mode can also accommodate non-periodic "data like" pre-amble allowing smoother transitions from pre-amble to payload from jitter perspective.
"We are pleased to offer a low power integrated solution to our customers combining CDR, Serializer and De-serializer functions into one device which can accommodate a wide variety of optical transceivers," said Hideki Yoneda, Executive Vice President of K-micro." In the future, K-micro will extend this capability to higher data rates to provide OLT SerDes solutions for next generation GPON networks."About K-micro (Kawasaki Microelectronics America, Inc.)
K-micro's innovative ASIC technologies and world-class design support are used in the consumer electronics, computer, office-automation, networking and storage markets. The company is an active participant in industry standards organizations, including InterNational Committee for Information Technology Standards (INCITS) Technical Committee T10 for SCSI Storage Interfaces, PCI Special Interest Group (PCI-SIG), USB Implementers Forum, Digital Living Network Alliance (DLNA), Universal Plug and Play Forum (UPnP), the Digital Display Working Group (DDWG), Home Phoneline Networking Alliance (HomePNA), Multimedia over Coax Alliance (MoCA), International Telecommunication Union (ITU) and OCP International Partnership (OCP-IP). K-micro has design centers in San Jose, Taipei, and Tokyo. For more information, contact the company at 408-570-0555, or visit http://www.k-micro.us