VIPswitch Selects Aldec's Verification Environment to Develop Industry's First Reprogrammable Terabit Router
Henderson Nevada, November 26, 2001-- Aldec, Inc., a leading supplier of HDL design entry and verification software for application specific integrated circuits (ASICs) and field programmable gate arrays (FPGAs) announced today that VIPswitch selected Active-HDL as its VHDL design entry and verification platform to develop its new class of Terabit switch/routers utilizing multiple Xilinx Virtex-II FPGAs.
The continued commitment of both Aldec and Xilinx to deliver world-class EDA and silicon solutions allowed VIPswitch to produce the industry’s first switch/router with full reprogramming capabilities based on an FPGA device. Aldec's verification solution supports the complete range of Xilinx Virtex-II Platform FPGAs and provided a complete design entry and verification environment for VIPswitch’s Terabit switch/routers. The ability to modify the devices in order to accommodate the new demands of growing technology, as well as the added financial savings of using FPGA devices, prompted VIPswitch to use FPGAs in place of ASIC chips.
After extensive evaluation and performance benchmarking, VIPswitch chose Active-HDL because of its integrated support of Virtex-II devices and clear path for supporting future generations of Xilinx FPGA devices.
“We are pleased that VIPswitch chose Active-HDL in support of their next generation designs. VIPswitch is continually producing pioneering designs that incorporate the best tools in the EDA industry, and Active-HDL’s leading simulation performance helped contribute to their advancements in technology and their ability to bring the designs to market sooner,” stated Megan Moran, Product Marketing Manager for Active-HDL.
"Xilinx and Aldec have a long-standing relationship that provides customers with the best solutions. Our companies work in concert to enable users to apply high performance verification techniques to their high-density designs, such as the one developed by VIPswitch. VIPswitch's manufacturing of the industry's first switch/router based on the Virtex-II Platform FPGA family illustrates how design engineers can use FPGAs as a cost-effective alternative to ASICs without compromising design quality, density, or performance," stated Rob Schreck, Senior Marketing Manager for Xilinx.
“VIPswitch’s designs exceeded 20 million gates and were developed by a team of over 20 design engineers. The high performance and flexibility of Active-HDL provided us with a complete design environment for our complex project,” said Yvon Gaudreau, Senior Manager of Hardware Development at VIPswitch. “In addition to the decreased verification run times, Active-HDL allowed us to simulate VHDL and EDIF designs from a common kernel; the Source Revision Control and other advanced team-based features allowed multiple design iterations without jeopardizing the integrity of the design. The comprehensive verification solution provided VIPswitch designers with complete control of the entire process, and its integration with Xilinx products offered a single environment to design, verify, synthesize and implement our Xilinx FPGAs.”
Aldec is currently offering the Active-HDL for the latest in team-based design support. The product is available as either a floating or node-lock license and includes Active-HDL’s Project Manager, HDL Editor, State Machine Editor, and Block Diagram & Schematic Editors, Automatic Testbench Generation, Waveform Viewer/Editor, and a choice of VHDL, Verilog or mixed VHDL/Verilog/EDIF simulation. All sales include one year of product maintenance. To receive your FREE evaluation copy, contact Aldec at www.aldec.com.
Aldec, Inc. has offered PC and Workstation-based design entry and simulation solutions to FPGA and ASIC designers for more than 16 years. During this time, Aldec has signed several OEM agreements with IC vendors, such as Xilinx, Inc. (NASDAQ:XLNX) and Cypress Semiconductor Corp. (NYSE:CY). Aldec, headquartered in Henderson, Nevada, produces a universal suite of Windows, Linux and UNIX-based EDA tools that allow design engineers to implement their designs using several different design entry methods (Schematic Capture, State Machine, Block Diagram, VHDL, Verilog or ABEL). Aldec incorporates patented simulation technology and several design entry tools to provide a complete design entry and simulation solution. Founded in 1984, the company continues to evolve in the EDA market as the fastest growing verification company in the world. Additional information about Aldec is available at http://www.aldec.com.
VIPswitch is the developer of a new class of Terabit switch/routers for Metropolitan Area Networks. VIPswitch's breakthrough application-aware technology enable Ethernet Metro Service Providers to deliver premium services, and real-time applications - with guaranteed QoS - to their subscribers, thereby generating new revenue. VIPswitch products' modular scalability - from Gigabits to Terabits - is the missing link that empowers savvy metropolitan service providers to build cost-effective optical IP networks. VIPswitch is a privately held company with offices in Boston and Montreal. For more information on VIPswitch, visit us on-line at www.VIPswitch.com
Active-HDL is a trademark of Aldec, Inc. Virtex-II is a registered trademark of Xilinx. All other trademarks or registered trademarks are property of their respective owners
Aldec Contact: Megan Moran VIPswitch Contact: Beverly Wilks
Aldec, Inc. VIPswitch
(702) 990.4400 ext. 201 (450) 923.4040 ext 253