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Ultra-low power 32 kHz RC oscillator designed in GlobalFoundries 22FDX
Jasper, AMD Ink Long-Term Formal Verification Deal
JasperGold® now used in AMD design centers worldwide to reduce design risk and meet delivery schedules
Mountain View, Calif. – April 28, 2009 – Jasper Design Automation today announced it has signed a long-term agreement with AMD (NYSE: AMD) to place JasperGold formal verification technology in AMD design centers worldwide.
“We chose Jasper formal due to the level of their technology, methodology and support,” said Paul Tobin, Director of AMD's Verification Center of Expertise. “Jasper solutions help AMD to improve quality and reduce schedule risk. Jasper is now broadly accessible to multiple processor and graphics projects.”
AMD’s work with JasperGold exemplifies Jasper’s “Targeted ROI” philosophy, solving customers’ most critical design challenges in ways that also speed time to market, reduce overhead, and mitigate risk.
Tobin cited a recent example involving a complex, next-generation multi-core processor design. Designers wanted to prove that resource starvation would never occur in a new logic design; high-level analysis for which simulation alone is often insufficient. Using JasperGold’s unique interactive proof and liveness property capabilities, AMD was able to prove very early that this would not occur, saving extensive simulation time and gaining confidence in the extensive proof that formal verification can provide.
“Formal verification helps in the discovery of subtle RTL issues which are difficult or even impossible to detect in simulation,” Tobin added. “We strive to thoroughly verify critical logic in these complex designs to ensure discrepancies never have an impact on silicon, and Jasper helps us towards achieving that goal.”
About Jasper Design Automation
Jasper delivers industry-leading EDA software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 100 successful chip deployments. Jasper, headquartered in Mountain View, California, is privately held, with offices and distributors in North America, South America, Europe, and Japan. Visit www.jasper-da.com for Targeted ROI: reducing risks; increasing design, verification and reuse productivity; and accelerating time to market.
Mountain View, Calif. – April 28, 2009 – Jasper Design Automation today announced it has signed a long-term agreement with AMD (NYSE: AMD) to place JasperGold formal verification technology in AMD design centers worldwide.
“We chose Jasper formal due to the level of their technology, methodology and support,” said Paul Tobin, Director of AMD's Verification Center of Expertise. “Jasper solutions help AMD to improve quality and reduce schedule risk. Jasper is now broadly accessible to multiple processor and graphics projects.”
AMD’s work with JasperGold exemplifies Jasper’s “Targeted ROI” philosophy, solving customers’ most critical design challenges in ways that also speed time to market, reduce overhead, and mitigate risk.
Tobin cited a recent example involving a complex, next-generation multi-core processor design. Designers wanted to prove that resource starvation would never occur in a new logic design; high-level analysis for which simulation alone is often insufficient. Using JasperGold’s unique interactive proof and liveness property capabilities, AMD was able to prove very early that this would not occur, saving extensive simulation time and gaining confidence in the extensive proof that formal verification can provide.
“Formal verification helps in the discovery of subtle RTL issues which are difficult or even impossible to detect in simulation,” Tobin added. “We strive to thoroughly verify critical logic in these complex designs to ensure discrepancies never have an impact on silicon, and Jasper helps us towards achieving that goal.”
About Jasper Design Automation
Jasper delivers industry-leading EDA software solutions for semiconductor design, verification, and reuse, based on the state-of-the-art formal technology. Customers include worldwide leaders in wireless, consumer, computing, and networking electronics, with over 100 successful chip deployments. Jasper, headquartered in Mountain View, California, is privately held, with offices and distributors in North America, South America, Europe, and Japan. Visit www.jasper-da.com for Targeted ROI: reducing risks; increasing design, verification and reuse productivity; and accelerating time to market.
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