IC Manage Releases Global Design Management Survey Results
April 29, 2009 – Los Gatos, CA – IC Manage, Inc. today announced the availability of its “Global IC Design Management Report” covering the results of a 412 respondent survey of IC design professionals.
IC Manage’s Global Design Management report can be read at: http://icmanage.com/globalDMreport09.pdf. The report covers the following findings from its industry-wide March 2009 global survey, along with an ROI impact summary:
- IC Design Management implementation plans for 2009
- Designers’ time spent on design management issues
- Design Management issues’ impact on project deadlines and tapeouts
- Primary justifications for implementing an IC Design Management system
- Major Obstacles to Deploying a Design Management system
About IC Manage
IC Manage, Inc. provides next generation design management solutions for IC design, enabling companies to efficiently and reliably manage single and multi-site design efforts. IC Manage's Global Design Platform (GDP) – utilizing the Perforce engine – is the first solution to offer design assembly, derivative management and content delivery in addition to scalable, ultra performance revision control, release and configuration management. IC Manage offers IT infrastructure integration for hot backup, high availability and disaster recovery for true 24x7 enterprise availability. IC Manage is headquartered at Suite 100, 15729 Los Gatos Blvd, Los Gatos, CA 95032. For more information, visit us at www.icmanage.com.
|
Related News
- IC Manage Announces Global Design Data Management for Synopsys' Galaxy Custom Designer Solution
- IC Manage GDP-XL Enterprise IP Catalog enables NXP to Improve IP Asset Management and Reuse
- IC Manage Announces Global Design Platform (GDP) for Scalable, Collaborative IC Design
- Global Top 10 IC Design Houses See 49% YoY Growth in 2024, NVIDIA Commands Half the Market, Says TrendForce
- Chiplet Interconnect Pioneer Eliyan Closes $60 Million Series B Funding Round, Co-led by Samsung Catalyst Fund and Tiger Global Management to Address Most Pressing Challenge in Development of Generative AI Chips
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |