DOLPHIN Integration Announces High Density BTF Library at 65 nm
The Dolphin Integration’s approach of one optimization criterion per stem, in association with two patented innovations dedicated to high density, ensures for HD BTF users the ultimate cost reduction at SoC level.
Moreover, through the elimination of Back-Tracking, thanks to the way of separating analog net drives from logic functions of cells, the HD BTF library realizes up to 60% of time savings for placement and timing optimization.
This new generation of libraries is launched at 65 nm LP for first availability. The stems for High Speed and Low Power shall be released soon for maximum flexibility for synthesis as well as Placement and Routing and for stem composition, enabling to address the widest range of SOC requirements.
The needed “logic standard” Motu Uta is made available on Dolphin Integration’s website to freely assess any library performance for fair comparison with Dolphin Integration’s latest innovation. It is made public to ease the transition to advanced technological processes.
For more information about our HD BTF library at 65 nm, click here.
About Dolphin
Dolphin Integration is up to their charter as the most adaptive creator in Microelectronics to "enable mixed signal Systems-on-Chip", with a quality management stimulating reactivity for innovation.
Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, resilient to noise and drastic for low power-consumption, together with engineering assistance and product evolutions customized to their needs.
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Dolphin Design Hot IP
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