BEAVERTON, Ore.-- May 6, 2009 --
Open Core Protocol International Partnership (OCP-IP) today announced the release of the OCP 3.0 specification for member review. This latest version contains extensions to support cache coherence and more aggressive power management, as well as an additional high-speed consensus profile and other new elements.
Embedded processors commonly used in SoCs often use local caches to improve performance and reduce power by storing frequently referenced storage locations in high bandwidth low latency local memories. Keeping such caches coherent with the external memories that they shadow requires either careful software engineering or costly hardware resources that have been considered too expensive for most SoCs. However, maintaining coherence in embedded software is becoming very complex so the OCP 3.0 coherence extensions are included to enable hardware-based coherence among the wide variety of heterogeneous CPUs, DSPs, accelerators and streaming input/output devices that characterize advanced SoCs.
The OCP extensions differ from traditional coherence approaches by cleanly separating the primitive operations associated with maintaining coherence from the specific system-level approach for implementing the communication and storage aspects of a coherent system. This extends a key advantage of OCP – the ability to develop IP cores independently from the system in which they will be used – into the domain of cache coherent systems. In particular, the OCP coherence extensions have been validated against both invalidate-based snoopy and directory-based coherence schemes.
As power minimization is important in most electronic systems, designers are increasingly implementing power management protocols on chip. OCP 3.0 defines a new connection protocol that allows the power management hardware to disconnect the OCP interface without losing any transaction so the manager may then independently shut off power.
Consensus profiles provide company engineers with standardized configurations of OCP options for specific system use cases, ensuring interoperability. A third profile (Profile 3) has been added in OCP 3.0. Profile 1 is a simple slave profile. Profile 2 is a high-speed profile, and Profile 3 is an advanced high-speed profile needed for high speed CPUs, high-performance video graphics accelerators and DRAMS. A detailed technical article on consensus profiles is available here.
“OCP-IP believes a standard is only proven through real-world implementations and products,” said Ian Mackintosh president and chairman of OCP-IP. “OCP-IP members, companies with world-class SoC design expertise in their own right, have used OCP in numerous SoC designs and have already shipped many hundreds of million of units. OCP 3.0 utilizes the collective experience of these SoC designers and EDA providers and directly addresses their enhancement recommendations with the new specification.”
Work on OCP 3.0 was executed by members of the OCP-IP Specification Working Group including: MIPS Technologies, Nokia, Sonics Inc, Texas Instruments, Toshiba and other industry leading companies.About OCP-IP
Formed in 2001, OCP-IP is a non-profit corporation promoting, supporting and delivering the only openly licensed, core-centric protocol comprehensively fulfilling integration requirements of heterogeneous multicore systems. The Open Core Protocol (OCP) facilitates IP core reusability and reduces design time, risk, and manufacturing costs for all SoC and electronic designs by providing a comprehensive supporting infrastructure. For additional background and membership information, visit www.OCPIP.org