SiliconBlue iCE65 mobileFPGA Family Strengthens Consumer Handheld Leadership with World's First Wafer Level Chip Scale Package SRAM FPGAs

Update: Lattice Semiconductor to Acquire SiliconBlue (Dec 09, 2011)

• Leading-edge technology for smallest board space and maximum FPGA logic & I/Os
• In production now at 0.4mm & sampling 0.5mm ball pitch die-sized WLCSPs
• Leadership technology co-developed and manufactured with TSMC
• Broadens offering of ultra-low power, single-chip SRAM mobileFPGA family

SANTA CLARA, California --  May 11, 2009 - SiliconBlue® Technologies, the leading supplier of ultra-low power, single-chip, SRAM FPGAs, today announced availability of two industry-first Wafer Level Chip Scale Package (WLCSP) options for its iCE65 mobileFPGA family. The ultra-low power, low cost features of iCE FPGAs combined with the die-sized packages in 0.5mm and 0.4mm ball pitch, provides solutions that meet the stringent size and space requirements of today’s real-world consumer mobile designs. “We now deliver the industry’s first ultra-low power, single-chip, SRAM FPGAs with the highest density, smallest form factor, and lowest cost, providing mobile handheld designers the ultimate combination in portability, flexibility, fastest TTM and ASIC-like costs,” says Kapil Shankar, CEO of SiliconBlue Technologies.

Low Cost iCE65 WLCSP for Mobile Applications

With packaging now done at the wafer level, these WLCSPs provide the best cost solution by eliminating expensive substrates and gold wire bonding. Both 200,000 (iCE65L04) and 400,000 (iCE65L08) system gates options offer mobile handheld designers new die-sized solutions at 3.2mm x 3.9mm with 0.4mm ball pitch and at 4.4mm x 4.8mm with 0.5mm ball pitch, respectively. The combination of high-density logic and ultra-small WLCSPs provides designers the ability to integrate up to 17x more logic functionality into the same board space versus competing Flash FPGA/CPLDs.

Compared to standard surface-mount packaging, WLCSPs also provide reduced chip-to-PCB inductance and improved thermal dissipation. In addition, all package dimensions meet industry standard JEDEC/EIAJ pitches, making them directly compatible with today’s SMT assembly and test.

iCE65L04 iCE65L08 Size 3.2mm x 3.9mm   Ball pitch 0.4mm 0.5mm Package CS63 CC72 Gates 200K System Gates 400K System Gates I/O 48 I/Os; 4 diff pairs 55 I/Os; 8 diff pairs Power Icc0sleep = 5µA Operating Icc= 15µA @ 32KHz Icc0 sleep = 11µA Operating Icc = 30µA @ 32KHz

Price, Availability, Support

Customers can immediately begin designing with these new product/package combinations using the iCEcube™ VHDL/Verilog-based development software. Unit cost for the iCE65L04 in CS63 is $1.50US, and $3.00US for the iCE65L08 in CC72, both 1M unit quantities (2010). CS63 is now available in high volume and CC72 available in sample quantities.

About SiliconBlue

SiliconBlue provides a new class of ultra-low power, single-chip, SRAM FPGAs designed specifically for handheld consumer applications. Manufactured on TSMC’s 65nm LP (low power) CMOS process, the iCE65 mobileFPGA family meets the power, price and area requirements for battery-operated products such as smart phones, eBooks/ePaper, netbooks, digital picture frames, mobile internet devices, portable media players, handheld POS, medical instruments, digital still cameras and flash camcorders. Headquartered in Santa Clara, California, the company has a highly skilled team of PLD experts who have been instrumental in developing and patenting many of the leading programmable logic technologies on the market today.

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