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Lattice Announces New Automotive Qualified Chip Scale 132 BGA Packaging for the LatticeXP2 Family
Automotive Processing Capability Now Available in a Single-Chip Solution with the Industry's Smallest FPGA Footprint
HILLSBORO, OR - JUNE 8, 2009 - Lattice Semiconductor (NASDAQ: LSCC) today announced the availability of automotive temperature qualified (AEC-Q100) low-cost Chip Scale 132 BGA (ball grid array) packaging for the non-volatile LatticeXP2™ FPGA family. Based on Lattice's 90 nanometer hybrid flexiFLASH™ technology, the XP2 family's new Chip Scale packaging enables realization of design requirements in the tightest form-factor automotive applications such as automotive camera modules, telematics systems, parking assistance systems and multimedia systems.
The Chip Scale 132 BGA packaging has been fully qualified and characterized to meet AEC-Q100 requirements from the Automotive Electronics Council, and is available for the XP2-5 and XP2-8 devices, with five thousand and eight thousand LUTs (Look Up Tables) available, respectively. Measuring 64 mm2 and 1.35 mm in height, the package footprint is the smallest available for non-volatile FPGAs.
"Our non-volatile XP2 family in AEC-Q100-qualified, low-cost Chip Scale 132 BGA packaging is a compelling solution for automotive designers who value high integration, source synchronous interfaces and low power consumption for tight form-factor applications," said Sean Riley, Lattice Corporate Vice President and General Manager of High Density Solutions. "This single chip solution delivers the most FPGA value in the smallest footprint available, an important requirement for most automotive systems, including cameras, engine control modules and media centers."
Pricing and Availability
Production quantities of the new devices are available immediately, and Lattice can provide standard PPAP (Production Part Approval Process) documentation to automotive customers requiring it. In 100K unit volume, the LA (Lattice Automotive) XP2-5 device is priced at $5.04.
About the flexiFLASH Architecture
Flash memory blocks are embedded within XP2 FPGAs to store the device configuration, providing a true single chip solution. At power up or on user command, the data stored in the Flash memory is transferred into SRAM cells that control the configuration of the device. This transfer is done in a massively parallel fashion, enabling the device logic to be available in approximately 1mS, well ahead of the other devices in the system and much faster than SRAM-based FPGAs that use external boot PROMs, regardless of whether they are provisioned separately on-board or stacked in the same package. This instant-on capability is critical for many system functions such as power up sequencing, address decoding and reset logic.
About the LatticeXP2 FPGA Family
The non-volatile LatticeXP2 FPGA family is a compelling solution for designers who value single chip integration, impressive processing power in the smallest footprint, source synchronous interfaces, design security and low power consumption. The XP2's unique benefits include low cost, small form factor Chip Scale 132 BGA packaging, and increased functionality such as embedded sysDSP™ blocks, pre-engineered source-synchronous I/O that supports 7:1 LVDS, DDR2 and high-speed ADCs/DACs.
Unlike traditional SRAM-based FPGAs, the LatticeXP2 device does not require an external boot memory for FPGA configuration, which enables a single-chip solution with the associated benefits of reduced board area and simplified system manufacture. The absence of an external boot device also eliminates the need for an external bit-stream at boot up and the possibility of bit-stream snooping, a major security concern with SRAM FPGAs. Additional security features prohibit bit-stream readback from the SRAM and Flash sections of the devices.
The LatticeXP2 design solution offers a unique set of features with broad appeal to a variety of markets, such as video security/ surveillance, LCD/display controllers, automotive systems, medical imaging, and industrial control systems, where processing power must be delivered with high integration in low-cost, small footprint packaging.
About Lattice Semiconductor
Lattice is the source for innovative FPGA, PLD and Mixed Signal programmable logic solutions. For more information, visit www.latticesemi.com
HILLSBORO, OR - JUNE 8, 2009 - Lattice Semiconductor (NASDAQ: LSCC) today announced the availability of automotive temperature qualified (AEC-Q100) low-cost Chip Scale 132 BGA (ball grid array) packaging for the non-volatile LatticeXP2™ FPGA family. Based on Lattice's 90 nanometer hybrid flexiFLASH™ technology, the XP2 family's new Chip Scale packaging enables realization of design requirements in the tightest form-factor automotive applications such as automotive camera modules, telematics systems, parking assistance systems and multimedia systems.
The Chip Scale 132 BGA packaging has been fully qualified and characterized to meet AEC-Q100 requirements from the Automotive Electronics Council, and is available for the XP2-5 and XP2-8 devices, with five thousand and eight thousand LUTs (Look Up Tables) available, respectively. Measuring 64 mm2 and 1.35 mm in height, the package footprint is the smallest available for non-volatile FPGAs.
"Our non-volatile XP2 family in AEC-Q100-qualified, low-cost Chip Scale 132 BGA packaging is a compelling solution for automotive designers who value high integration, source synchronous interfaces and low power consumption for tight form-factor applications," said Sean Riley, Lattice Corporate Vice President and General Manager of High Density Solutions. "This single chip solution delivers the most FPGA value in the smallest footprint available, an important requirement for most automotive systems, including cameras, engine control modules and media centers."
Pricing and Availability
Production quantities of the new devices are available immediately, and Lattice can provide standard PPAP (Production Part Approval Process) documentation to automotive customers requiring it. In 100K unit volume, the LA (Lattice Automotive) XP2-5 device is priced at $5.04.
About the flexiFLASH Architecture
Flash memory blocks are embedded within XP2 FPGAs to store the device configuration, providing a true single chip solution. At power up or on user command, the data stored in the Flash memory is transferred into SRAM cells that control the configuration of the device. This transfer is done in a massively parallel fashion, enabling the device logic to be available in approximately 1mS, well ahead of the other devices in the system and much faster than SRAM-based FPGAs that use external boot PROMs, regardless of whether they are provisioned separately on-board or stacked in the same package. This instant-on capability is critical for many system functions such as power up sequencing, address decoding and reset logic.
About the LatticeXP2 FPGA Family
The non-volatile LatticeXP2 FPGA family is a compelling solution for designers who value single chip integration, impressive processing power in the smallest footprint, source synchronous interfaces, design security and low power consumption. The XP2's unique benefits include low cost, small form factor Chip Scale 132 BGA packaging, and increased functionality such as embedded sysDSP™ blocks, pre-engineered source-synchronous I/O that supports 7:1 LVDS, DDR2 and high-speed ADCs/DACs.
Unlike traditional SRAM-based FPGAs, the LatticeXP2 device does not require an external boot memory for FPGA configuration, which enables a single-chip solution with the associated benefits of reduced board area and simplified system manufacture. The absence of an external boot device also eliminates the need for an external bit-stream at boot up and the possibility of bit-stream snooping, a major security concern with SRAM FPGAs. Additional security features prohibit bit-stream readback from the SRAM and Flash sections of the devices.
The LatticeXP2 design solution offers a unique set of features with broad appeal to a variety of markets, such as video security/ surveillance, LCD/display controllers, automotive systems, medical imaging, and industrial control systems, where processing power must be delivered with high integration in low-cost, small footprint packaging.
About Lattice Semiconductor
Lattice is the source for innovative FPGA, PLD and Mixed Signal programmable logic solutions. For more information, visit www.latticesemi.com
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