Altera's Stratix IV GX FPGAs Deliver Unprecedented Performance for Sumitomo Electric Industries' LDPC System
SAN JOSE, Calif.-- July 13, 2009 -- Altera Corporation (NASDAQ:ALTR - News) today announced Sumitomo Electric Industries, Ltd. is leveraging 40-nm Stratix® IV GX FPGAs in an advanced low-density parity-check (LDPC) system. Altera's high-performance, high-bandwidth Stratix IV GX FPGAs enabled Sumitomo to develop a high-speed measurement system that verifies the forward error correction (FEC) code for high-speed digital signal processing (DSP). Sumitomo's high-throughput LDPC system features a novel encoding and decoding algorithm capable of improving the signal quality in applications that require highly efficient data transmission, such as image processing, next-generation optical memory, high-definition (HD) digital video broadcasting, mobile broadband communications and optical networking.
"Altera's Stratix IV GX FPGA provides us with a cost-effective, single-chip solution that delivers best-in-class performance and data rate speeds, allowing us to realize over 100-Gbps performance in our LDPC system," said Mr. Takashi Maehata, assistant general manager, transmission system department, information and communication laboratories, Sumitomo Electric Industries. "Obtaining this level of performance would not have been possible without Stratix IV GX FPGAs and their integrated 8.5-Gbps transceivers. As a result of using Altera's Stratix IV GX FPGAs, our LDPC system achieves a throughput of 132-Gbps encoding and 24.48-Gbps decoding."
Altera® Stratix IV GX FPGAs and Quartus® II design software provide Sumitomo with a seamless development environment from algorithm to automatic HDL generation. The Stratix IV GX FPGA-based LDPC system interfaces with a multi-Gigabit analog/digital converter (ADC) and features a Nios® II embedded processor. The embedded processor operates a TCP/IP protocol stack and facilitates the LDPC encoder and decoder. The system's circuits were developed using the Quartus II software and the DSP Builder and SOPC Builder tools.
Luanne Schirrmeister, senior director of component product marketing at Altera, stated, "Today's leading-edge, data-intensive systems are increasing the demand for high-bandwidth devices that are capable of rapidly processing large amounts of data. Our 40-nm Stratix IV FPGAs continue to push the technology envelope in terms of performance and data-rate speeds, allowing companies like Sumitomo to develop advanced systems that previously were not possible."
About Stratix IV FPGA Family
Altera's 40-nm Stratix IV FPGAs deliver the industry's highest density, highest performance and lowest power, while providing proven transceiver and memory interface technology. The high-end FPGAs feature three variants, a non-transceiver enhanced (E) version and two transceiver (GX and GT) versions. The GX and GT variants feature integrated transceivers that provide an unprecedented level of system bandwidth (up to 8.5 Gbps and 11.3 Gbps respectively) with superior signal integrity. Stratix IV E FPGAs are high in density and rich with embedded memory and DSP resources. For more information on the market-leading features offered by Stratix IV FPGAs, visit www.altera.com/pr/stratix4.
About Altera
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGA, CPLD and ASIC devices at www.altera.com.
|
Altera Hot IP
Related News
- Altera's Stratix IV FPGAs Deliver Unprecedented Acceleration for World’s Most Powerful Reconfigurable Supercomputer
- Altera's Stratix IV GX FPGAs Move to Volume Production
- Altera Announces Stratix IV GT and Arria II GX FPGAs: Expands Industry's Broadest Integrated Transceiver Portfolio
- Altera's Stratix III FPGAs Deliver Advanced Computing Power and Performance in Quasonix's Latest Telemetry Products
- Intilop delivers on Altera FPGAs, their 7th Gen. industry first, Full TCP, UDP & IGMP Hardware Accelerator System with Dual 10G ports for all Hyper Performance Networking Systems
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |