Protocol Expertise Provides Foundation for Verification Planning and ExplorationSUNNYVALE, Calif. -- July 23, 2009
-- Denali Software, Inc., a world-leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced the availability of the extended PureSpec™ verification IP solution with planning and protocol exploration capabilities, plus seamless integration into 3rd party verification planners, such as Synopsys® VMM Planner. These predictable protocol verification features enable design and verification engineers to accelerate and achieve verification closure. Visit the Denali booth (#1424) at DAC for a live VMM Planner demonstration.
“The new release of Denali’s PureSpec addresses the expertise and predictability gap in the verification of complex protocols,” states Dr. Ambar Sarkar, Chief Verification Technologist at Paradigm Works. “They have been leading the industry with their comprehensive verification IP solutions for protocols, like PCI Express and USB, and these breakthrough capabilities will certainly increase adoption.”
Denali’s PureSpec verification solution generates a customized and comprehensive hierarchical test plan based on protocol specifics and design parameters. This planning feature provides design and verification engineers with an unbiased and complete test plan in standard formats, offering a transparent and objective measurement scale.
The protocol explorer within PureSpec provides visibility into protocol concepts and objects, instead of simple wave forms. This context sensitive and protocol-aware debugger facilitates the reporting of state machines and properties, and back tracing of data packets and protocol events, thus shortening the debugging cycle times.
Additionally, PureSpec enables seamless integration with advanced verification methodologies and third party planners enabling automated verification and back-annotation of the coverage data to the test plan. This tight integration closes the loop and substantially improves the predictability of the verification process. Denali’s CTO, Mark Gogolewski, will present at the Synopsys Interoperability Breakfast on Wednesday, July 29, “Peace, Love and Interoperability: Improving Quality & Productivity with Verification & Custom Design Standards” which will highlight PureSpec’s integration with VMM Planner.
“Language and methodology standards have a major impact on customers’ verification interoperability and productivity,” said Yatin Trivedi, director of standards at Synopsys. “Denali’s support for the VMM methodology, including their new verification plans compatible with Synopsys’ VMM Planner, benefits the growing VMM ecosystem.”
“Protocol expertise plays an important role when addressing today’s complex verification challenges,” states Sanjiv Kumar, director, Verification IP products at Denali. “Our PureSpec product enables automated validation of a protocol interface through high-quality test plans, sequence and assertion libraries and BFM via any coverage driven methodology. Denali PureSpec further delivers a powerful capability for protocol-aware exploration and intuitive debugging.”About Denali PureSpec
PureSpec is a predictable verification solution for protocol compliance and enables verification planning and coverage-driven verification closure. PureSpec verification solution includes a configurable bus functional model, protocol monitor, and complete assertion library for all components in the topology. PureSpec additionally provides an integrated data generation engine to help drive defined, pseudo-random bus traffic at all layers. A cumulative coverage database capability ensures that the overall test plan sufficiently exercises the design. For more product information, visit: www.denali.com/purespec
.About Denali Software
Denali Software, Inc., is a world-leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry’s most trusted solutions for deploying USB, PCI Express, NAND Flash and DDR DRAM subsystems. Developers use Denali’s EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Sunnyvale, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at www.denali.com