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ISSCC: Hitachi to market SH3 as IP core
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ISSCC: Hitachi to market SH3 as IP core
By Stephan Ohr, EE Times
February 18, 1999 (5:05 p.m. EST)
URL: http://www.eetimes.com/story/OEG19990218S0014
SAN FRANCISCO — Hitachi Semiconductor (America) Inc. has quietly let it be known at ISSCC this week that it would soon market its SH3-DSP chip as a synthesizable core. The device, which combines a 32-bit, 133-MHz microprocessor with a 133-Mips digital signal processor, is currently available only as a packaged part (the SH7729). The maneuver is intended to make the SH3-DSP more competitive with the ARM and Oak DSP cores, which are available as highly customizable soft cores, said Peter Clark, president and chief executive officer.
But there will be differences between the cores Hitachi will introduce later this year and the original SH3, said marketing manager David Pelavin. For one, synthesizable cores tend to be larger than the hardwired device. "You get flexibility at the expense of chip size," Pelavin said. The embedded device will likely be larger still.
Hitachi will probably streamline the DSP, tweaking the arithmetic logic u nit and multiply-accumulate unit for efficiency and lower power consumption per cycle. The DSP and the CPU are tightly coupled in the SH7729, with DSP operations culled automatically from the CPU instructions.
The device would be supported with memory-management units, caches and similar peripherals. The goal is to make the SH3-DSP useful for Windows CE machines and other appliances, Pelavin said.
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