Mentor Graphics says it is time to address the challenges of verifying IC designs now that a single chip can represent a complete system.
By Richard Wilson; Electronicsweekly, Mar. 11, 2016 –
Mentor Graphics says it is time to address the challenges of verifying IC designs now that a single chip can represent a complete system.
The answer is in the power of the software running on a high performance hardware emulator.
Mentor has long maintained that emulation is the only way to verify complex system-on-chip (SoC) designs. Now it has introduced emulation techniques which address system-level verification challenges in complex SoC and system designs.