NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
Optimization key to the future, says EDA pioneer
Dylan McGrath, EE Times
(09/18/2009 7:10 PM EDT)
SAN FRANCISCO—The greatest opportunity for EDA lies in providing optimization for system-on-chip designers as opposed to more functionality, according to a long-standing veteran of EDA.
"EDA as we know it today will be less feature introduction and more about optimization," said Jim Hogan, a 35-year veteran of EDA, IP and the broader semiconductor industry who is currently a managing partner at venture capital firm Vista Ventures LLC. Hogan goes way back in the EDA industry and was an influential executive at Cadence Design Systems Inc. for many years.
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