MIPS introduces 'hard' CPU core

MIPS introduces 'hard' CPU core
By EBN
February 14, 2002 (3:08 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020214S0034

Further diversifying its embedded processor offerings, MIPS Technologies Inc. today announced availability of the MIPS64 20Kc, a licensable "hard" CPU core designed for power- and cost-sensitive applications like set-top boxes, multimedia home gateways, automotive telematics, and game consoles.

MIPS, Mountain View, Calif., said the processor allows system designers to reduce end-product cost and development time by using software to implement features traditionally handled by dedicated hardware blocks.

The 64-bit, 600MHz core, fabricated in 0.13-micron technology, is said to achieve performance of 1370 Dhrystone 2.1 mips (millions of instructions per second). The 20Kc architecture is designed to scale to 1GHz in a 0.10-micron process, and is already available at 400MHz in Taiwan Semiconductor Manufacturing Co. Ltd.'s 0.18-micron process.

MIPS also recently made available its MIPS64 5Kc hard core in TSMC's 0.18-micron process, targeting digit al consumer and network applications.

The 20Kc features a dual-issue, superscalar, 7-stage pipeline, with integer and floating-point unit capability and SIMD instructions. Two 32Kbyte caches and a new scaleable-width SoC bus called MGB Link enable peak 3.6Gbytes/sec on-chip throughput. At 600MHz in 1V operation, the core disspates 1.5W, MIPS claims. Pricing was not disclosed.