NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
ST Micro, Alcatel to co-develop GSM/GPRS chip sets based on DSP core
![]() |
ST Micro, Alcatel to co-develop GSM/GPRS chip sets based on DSP core
By Semiconductor Business News
February 14, 2002 (1:05 p.m. EST)
URL: http://www.eetimes.com/story/OEG20020214S0027
GEVEVA -- STMicroelectronics Inc. and Alcatel SA today announced an alliance to co-develop future GSM/GPRS chip sets for mobile phones and other wireless connectivity applications. Under the terms of the agreement Alcatel of Paris is transferring its team of mobile-phone integrated circuit designers to ST. Geneva-based ST will get access to know-how and intellectual property (IP) developed by this group. The digital baseband chips, to be developed by the Alcatel/ST design team, is based on ST's ST100 digital signal processor (DSP) core. In 2000, Alcatel chose ST's ST1000 as its preferred core for communications applications. The resulting chip set will be available for the open market. This co-operation also includes a multi-year supply agreement associated with 2.5G chip sets. The additional power of the ST100 will allow enhancements to chip set performance and the implementation of new features. ST and Alcatel have been partners for many years, jointly developing a large variety of integrated circuits for communications applications.
Related News
- IPFlex and Sobal Co-Develop FFT Development Kit for DAPDNA-2; Starts Shipping Today-Sobal Joins DAPDNA Partner Program
- Silicon Laboratories Deploys CEVA-Teak DSP Core in Industry's Most Highly-Integrated Single-Chip Phone for GSM/GPRS Handsets
- Spreadtrum Commences Shipments Of GSM/GPRS Chip Powered By CEVA-TeakLite DSP Core To Chinese Market
- GDA Technologies and Xilinx Co-develop Industry’s First HyperTransport Compatibility Test Platform
- Infineon expands networking chip efforts, signs deal with Massana to co-develop transceivers
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |