Accellera Members Approve VIP Standard Best Practices Guide, Continue Improving EDA Verification and Interoperability

Committee to develop Common Base Class Library and associated verification methodology

NAPA, CA, USA -- September 30, 2009 -- Accellera, the leading standards organization developing language-based standards used by system, semiconductor, Intellectual Property (IP) and Electronic Design Automation (EDA) companies, announced today that it has approved the Accellera Verification Intellectual Property (VIP) Best Practices Interoperability Guide, a document resulting from the work of its VIP Technical Subcommittee (TSC), which was formed in May 2008.

The Guide details how to use VIP components developed using SystemVerilog testbench environments based on either the Open Verification Methodology (OVM) or Verification Methodology Manual (VMM) interchangeably to lower verification costs and improve design quality.

“The results of Accellera’s VIP Interoperability standardization effort makes it easier to reuse verification components and reduces the cost of repurchasing and rewriting IP for each new project or electronic design automation tool,” said Shrenik Mehta, Accellera chair. “We applaud the efforts of Accellera’s VIP TSC for reaching this significant milestone and for making their Best Practices Interoperability Guide available to the EDA community.”

What’s New

The VIP Best Practices Interoperability Guide includes a VIP reference library that can be used as part of a verification interoperability methodology and a chapter devoted to introducing the highlevel concepts of interoperability and component integration. It outlines a process that can be used to define a verification environment and select which cross-referenced best-practice sub-chapter or sub-chapters apply to specific integration challenges.

What’s Next & Call for Participation

Accellera's VIP TSC will continue its efforts to develop a Common Base Class Library (CBCL) and associated verification methodology with the goal of achieving IEEE standardization Accellera’s VIP Technical Subcommittee is open for participation by everyone, and holds weekly meetings on Wednesdays at 9am PST. Accellera membership offers additional benefits to participants. To contribute and join Accellera’s VIP TSC, please visit www.accellera.org/activities/vip.

Why Interoperable VIP Components?

Verification solutions are ubiquitous, differing from company to company and among separate organizations within companies. Commercial tool suppliers do not support all the verification solutions in use today. The result is that there are many different methods for doing the same thing, requiring retraining and conversion costs. Interoperable VIP components reduce the cost of using and re-using VIP and improve the quality of design verification by eliminating translation errors.

About Accellera

Accellera provides design and verification standards for quick availability and use in the electronics industry. The organization and its members cooperatively deliver much-needed EDA standards that lower the cost of designing commercial IC and EDA products. As a result of Accellera’s partnership with the IEEE, Accellera standards are provided to the IEEE standards body for formalization and ongoing change control.

On June 11, 2009, EDA industry organizations, Accellera and The SPIRIT Consortium, announced that the organizations’ Boards agreed to a merger of the two entities. The union improves the development of language-based and IP standards. Both organizations are aligned on the path to formalize standards through the IEEE.

For more information about Accellera, please visit www.accellera.org.