Arasan Announces Its participatioin the Annual IP & ESC Conference in Grenoble, France
San Jose, California - October 22, 2009 - Arasan Chip Systems, Inc. ("Arasan"), a leading provider of Intellectual Property (IP) Cores, announced today its participation in the IP - ESC 2009 (IP-Embedded Systems Conference) in Grenoble France, the Silicon Valley of the French Alps. On behalf of Arasan, Ram Gopalan is producing the panel "Total IP Solutions for Enabling Technology Adoption," on Tuesday, December 1st, from 1530 to 1700. The panel will examine all components required to build an SoC: synthesizable RTL IP, verification IPs, software drivers and stacks, hardware development and validation kits and design services for customization. Arasan and Cadence will provide the vendor perspective and representatives from ST Ericsson, among others, will provide the designer's perspective of the elements in the total solution.
In addition, also on Tuesday December 1, 2009 from 1330 to 1500 in the session IP Business Model & Standardization, Somnath Viswanath from Arasan Chip Systems Inc. will present "MIPI Alliance - Fostering Innovation with Standardized Interconnect." Involved from the early days of MIPI's standardization effort, Arasan is a leading provider of all MIPI IP with a portfolio encompassing controllers, PHYs, software stacks and analyzers. On Thursday December 3, 2009 during the Forum on Design session from 1430 to 1600, Somnath will also present "Evolving to a Total IP Solution to Accelerate SoC Design." If you're attending the conference, please plan to join Arasan's three presentations.
Increasing Acceptance of Standards-Based Peripheral IPs
Today's complex silicon-on-chip (SoC) designs contain multiple instances of silicon intellectual property. A large number of these SoCs contain many peripheral interface IP blocks and are destined for consumer electronics, hand held mobile multimedia devices as well as audio video equipment in the home. On some large SoCs, as much as 85 percent of silicon real estate is made up of third party IP and a large percentage of this is peripheral interface IP-SD, SDIO, USB, and MIPI-needed to store and route video, audio, and data within these designs. The time-to-market constraints on chips destined for consumer electronic devices and the standardization of individual interface IP blocks has made it compelling to buy rather than build these blocks. This has created a large and steady demand for interface IP from third party suppliers and Arasan is an acknowledged leader in the market, especially with their one stop shop approach.
About Arasan Chip Systems
Enabling Technology Adoption through Total IP Solutions - The Bus Stops Here!
Arasan Chip Systems Inc. (www.arasan.com), headquartered in San Jose, CA, USA, is a world leading supplier of SoC Intellectual Property solutions. Arasan delivers technology-leading Bus IP solutions like MIPI, SD / SDIO, USB, PCI, Ethernet, MMC, CE-ATA, CF+, NAND and more, to the global electronics market. Arasan's Total IP Solution Approach includes RTL IP cores, Verification IP (VIP), Portable Software Drivers / Stacks, Hardware Development Kits, Validation Platforms and Design Services. Arasan's IP Solutions portfolio enables designers to accelerate their development and minimize the risks associated with production of complex system-on-chips (SoCs). Arasan provides a competitive advantage through a combination of domain expertise, silicon proven IP, hardware / software tools, and customization services.
|
Arasan Chip Systems Hot IP
Related News
- Arasan Chip Systems' Participation at IP & ESC'09, Grenoble, France Captures Evolution of IP Business to Total IP Solutions
- Arasan to demonstrate its Total MIPI Solution at MIPI Conference in Japan
- Evatronix to Discuss Digital and Mixed Signal IP Design Issues at the IP-SoC 2010 Conference in Grenoble
- Arasan Chip Systems showcases its embedded Software and System Tools complementing its IP Portfolio at ESC
- Broad Range of Chips&Media-powered Solutions Displayed at 2010 Embedded Systems Conference (ESC) in Silicon Valley
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |