Integration of Arasan’s MIPI Design IP into Cadence’s Incisive Verification Kit Enables Unprecedented Ease of Adoption for Advanced SoC Verification
San Jose, California – October 29, 2009– Arasan Chip Systems today announced an agreement with Cadence Design Systems to collaborate on delivering functional verification best practices. Under the agreement, Cadence will engineer Arasan’s MIPI design IP into the Cadence Incisive Verification Kit, which incorporates Cadence-developed MIPI-based verification IP, example flows, user workshops and documented best practices. The collaboration will enable potential MIPI users to see first hand a comprehensive working environment with hands-on workshops and labs that demonstrate the industry-standard Open Verification Methodology (OVM). Cadence will distribute the kit as part of its Incisive verification solution.
According to Arasan, “We provide a complete suite to enable SOC designers to build their solution by way of IP cores, software drivers and verification/validation utilities. Many of our customers prefer the Cadence Incisive functional verification platform and the OVM-ready verification IP provided by Cadence to achieve the goals of first-time success with their SoC. This symbiotic relationship enables both Cadence and Arasan Chip Systems to provide the best possible solutions to our customers, “said Richard Timpa, Executive Vice President for Arasan Chip Systems.
According to Cadence, “We see a major trend emerging around SoC integration, leveraging third-party design IP from companies like Arasan. This collaboration simplifies the challenge of verification at the SoC level, and offers a systematic approach to making sure that the protocol design IP can functionally connect and distribute transactions to devices supporting the protocol,” said Michal Siwinski, Group Marketing Director for Cadence Design Systems. “Engineers can easily modify the pre-built executable verification plan to accommodate the particular configuration used in their integrated design and can add other elements from the Cadence Verification IP Portfolio of 30-plus protocols.” Further, Mr. Siwinski explains, “The Incisive Verification Kit effectively teaches these flows and use models by example, enabling our mutual customers to achieve significantly more complete verification results using the Incisive metric-driven verification techniques.”
The integrated solution will be available with the Incisive Verification Kit, part of the Incisive Enterprise Simulator and Incisive Enterprise Verifier products, both of which are available now. The solution’s initial focus is on the MIPI CSI protocol, but plans are in place to expand to MIPI DSI and USB 3.0, as well.
Arasan Chip Systems Inc. (www.arasan.com), based in San Jose, CA, USA, is a world-leading supplier of SoC Intellectual Property solutions. Arasan delivers technology-leading Bus IP solutions like MIPI, SD/ SDIO, USB, PCI, Ethernet, MMC, CE-ATA, CF+, NAND and more, to the global electronics market. Arasan’s Total Solution Approach includes RTL IP cores, Verification IP (VIP), Portable Software Drivers / Stacks, Hardware Development Kits, Validation Platforms and Design Services. Arasan’s IP Solutions portfolio enables designers to accelerate their development and minimize the risks associated with production of complex system-on-chip (SoCs). Arasan provides a competitive advantage through a combination of domain expertise, silicon proven IP, hardware / software tools, and customization services.