Grenoble, France -- November 23, 2009 -- DOLPHIN Integration promotes a novel approach to the development of Virtual Components of Silicon IP, namely “Application Hardware Modeling”. AHM aims at optimizing any critical function performed jointly by parts of the system, comprising some Virtual Component within a SoC, its PCB with relevant discrete components, such as Quartz, PMIC, or MEMS, along with application software.
Performing an application hardware simulation allows the designers and/or FAEs to anticipate the disruption linked to the integration of components in the system and to check the corrective solutions, be they on the ViC, the SoC or the PCB. It ends-up helping to reduce costs as well as time-to-market of the final application because the right questions finally are raised at the right time.
The mixed-signal simulator SMASH enables AHM simulation because it natively handles multiple description levels with any hardware description languages in a single netlist like Verilog A, etc. In particular, SMASH is known as a reference for its VHDL-AMS compliance and support while EMBLEM libraries supplied by DOLPHIN provide the complement for AHM model assembly whenever multi-domain modeling is required, as with MEMS, etc.
Indeed, AHM is not a mere promotional gadget for a supplier of Silicon IP: it is tomorrow’s solution for the FAE of any Fabless Supplier of IC’s with serious concerns for:
- Power Regulation,
- IP evaluation with testchip or simulation,
- Data Rates,
- Jitter Resilience,
- Supply Noise Reduction,
- Power Consumption,
- Pop-up Noise
DOLPHIN Integration will present this new approach at the ICCAD Symposium in Xiamen, China, on December the 3rd.
The free discovery option of SMASH is available for download at: http://www.dolphin.fr/smash
For more information on AHM, feel free to download the brochure or contact Nathalie Dufayard at firstname.lastname@example.org