Xelic, Inc., a leading provider of RTL Cores for Networking Applications, today announced the expansion of their Enhanced Forward Error Correction core offering based on ITU-T G.975.1 Specifications.
Rochester, NY -- December 8, 2009 -- Xelic today announced the immediate availability of their new 40G Enhanced Forward Error Correction (EFEC) core (XCO3EFEC4). This core is fully compliant with AMCC's I.4 submission to the ITU-T G.975.1 specification. The XCO3EFEC4 complements Xelic's 10G I.4 EFEC (XCO2EFEC4) and I.7 EFEC (XCO2EFEC7) offerings which have been extensively interop tested with compatible EFEC devices.
"The introduction of our new 40G I.4 compliant EFEC core and the soon to be announced 40G I.7 EFEC core (XCO3EFEC7) allows Xelic to provide complete OTN solutions for both ASIC and FPGA target applications." said Dave Wurthmann, Director of IP Business Development. Xelic's EFEC cores are offered as a companion add-on to their existing OTN framers. A shared memory interface is provided for applications utilizing multiple EFEC algorithms enabling optimized resource utilization.
As a member of ITU Study Group 15, Xelic is focused on deploying RTL building blocks in support of the latest standards. They currently have a proven offering of cores for client termination and aggregation via multi-protocol mapping, multi-rate ODU multiplexing, framing, and FEC/EFEC for OTN at 2.5G, 10G, and 40G - with 100G in development.
Xelic is a leading provider of networking Intellectual Property (IP) for ASIC and FPGA applications. They offer standards based cores for OTN, GFEC/EFEC, SONET/SDH, GFP, Ethernet, Fibre Channel, and other related protocols. Xelic also provides design services focused on core integration support and customized networking applications. Xelic is a licensed developer of AMCC ITU-T G.975.1 I.4 patented technology.