32-bit RISC-V embedded processor with TUV SUD ISO 26262 ASIL B certification
Tensilica Introduces ConnX Atlas Reference Architecture for LTE
Update: Cadence Completes Acquisition of Tensilica (Apr 24, 2013)
Multi-Standard Programmable Radio Platform Also Supports Other Standards Including HSPA+
SANTA CLARA, Calif. - February 8, 2010 -Tensilica, Inc. today introduced its ConnX Atlas LTE (Long-Term Evolution) reference platform, a heterogeneous seven-core reference architecture for a complete multi-standard programmable radio for advanced mobile devices. Atlas is designed to support the 3GPP (3rd Generation Partnership Project) LTE standard, as well as other complementary standards such as HSPA+ (Evolved High-Speed Packet Access), in a single platform. No additional hardwired hardware blocks are required, even for the computationally complex turbo decoder at 154 Mbps downstream data rates.
The ConnX Atlas LTE reference architecture is designed to be a launching point for Tensilica licensees who are designing their own software-programmable or hybrid hardware/software modems. ConnX Atlas brings the power of advanced DSP (digital signal processing) programmability to create a new radio platform or evolve an existing hardwired mobile terminal radio design.
"By implementing the entire LTE Layer 1 PHY in a series of optimized cores, we unite the area and power optimization designers expect from hardwired dedicated function blocks together with the programmability benefits of a programmable radio," stated Steve Roddy, Tensilica's vice president of marketing and business development. "This reference architecture is designed to accelerate the SOC design process, giving our customers a huge time-to-market advantage and, if so desired, the ability for rapid customization using our Xtensa DPU foundation."
The ConnX Atlas reference architecture consists of the definitions of the seven constituent cores and optimized software libraries to support the key computational kernels of the LTE standard. The new ConnX BBE16 DSP core, also announced today (see separate release) is a key building block of the Atlas platform. Also included in the Atlas reference architecture are the ConnX Soft Stream Processor, ConnX Turbo16 turbo decoder, and the ConnX Bit Stream Processor.
Tensilica is engaging now with a small group of Early Access Partners for Atlas platform development. General availability of the platform will occur in early 2011.
About Tensilica
Tensilica, Inc. - the leader in customizable dataplane processors - is a semiconductor IP licensor recognized by the Gartner Group as the fastest growing semiconductor IP supplier in 2008. Dataplane Processor Units (DPUs) combine the best capabilities of CPUs and DSPs while delivering 10-to-100-times the performance because they can be customized using Tensilica's automated design tools to meet specific dataplane performance targets. Tensilica's DPUs power SOC designs at system OEMs and five out of the top 10 semiconductor companies for products including mobile phones, consumer electronics devices (including digital TV, Blu-ray Disc players, broadband set top boxes and portable media players), computers, and storage, networking and communications equipment. For more information on Tensilica's patented, benchmark-proven DPUs visit www.tensilica.com.
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