Virage Logic Corp. today will unveil a product that allows system designers to reduce bills of materials by integrating small amounts of nonvolatile memory on an SoC using a standard logic process.
Novea RAM, the first in Virage's new embedded-memory line, retains its contents at power-off while allowing data to be reprogrammed and erased.
"This duplicates the circuit technology of flash [memory] on a standard logic process without extra mask layers," said Vin Ratford, vice president of marketing and business development at the Fremont, Calif., IP vendor.
Available on Taiwan Semiconductor Manufacturing Co. Ltd.'s 0.18-micron process, and 0.13-micron later this year, Novea RAM addresses applications such as set-top boxes, chip identification, and electrical metering equipment.
Designers can choose the size and shape of the nonvolatile memory from a density of a few hundred bits up to 16Kbits, Ratford said. Given the product's low density , Virage expects the new memory will typically be used to replace EEPROM. About 1.5 billion EEPROM units were shipped last year, and about 85% of those units had densities of 16Kbits or less, Ratford said.
Electrically, however, Novea RAM is more like flash memory, which means designers also have an alternative to low-density embedded flash, he said.
"It's one of those innovative techniques that would allow you to easily integrate another little piece of the SoC picture," said Jim Feldhan, an analyst at Semico Research Corp., Phoenix. "Why have another tiny package sitting off the chip, when now you can integrate it and there's no real penalty?"
Novea RAM is currently designed for 1,000 write operations at speeds of 100ms, regardless of the memory size. An on-chip charge pump of 7 to 12V allows users to write to the memory in the field.
License fees for Novea RAM range from $100,000 to $500,000 for pure-play foundries. An additional royalty is assessed per chip, Virage said.