Dolphin Integration complements their portfolio of ROM with a shrinked variant of Cassiopeia for the 152 nm process

Meylan, France – May 14, 2010. Dolphin Integration’s offering of embedded ROMs has been steadily enriched for more than 20 years with generators from 500 nm down to 65 nm and soon 40 nm.

Embedded in an impressive number of Systems-on-Chip, the Ragtime family of metal programmable ROM is enriched with the release of generators of the dROMet Cassiopeia architecture for both the LP and G processes at TSMC 152 nm.

The dROMet Cassiopeia generator is part of the Ragtime catalog for ROMs granting the optimal trade-offs between latest programming and smallest area, from minimal to large capacity, widely silicon proven and with worldwide high volume references:

• Single Metal Programmable ROM for capacities from 1 kb up to 1 Mbit
• Double Metal Programmable ROM from 1 kb up to 1 Mbit
• Triple Metal Programmable ROM for large capacities beyond 1 Mbit

dROMet Cassiopeia is the golden path for Fabless companies to reduce silicon costs!

• Up to 20% denser than alternative solutions
• ·Patented high density bit cell
• Late programmable ROM

More information on the key performances and benefits of the dROMet Cassiopeia is available directly on:

http://www.dolphin.fr/flip/ragtime/018/ragtime_018_rom.html

Thinking that these performances are unbelievable? To get access to our online generator for benchmarking purposes, please contact: ragtime@dolphin.fr

About Dolphin Integration

Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own missing EDA solutions enabling Application Hardware Modeling (AHM) as well as early Power and Noise assessment, plus engineering assistance for Risk Control. For more information about Dolphin, visit: www.dolphin.fr/ragtime

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