Low jitter, ultra-low power (<950uW) ring-oscillator-based PLL-2.4GHz
Analyst: Xilinx at risk of double ordering
Dylan McGrath, EE Times
(05/18/2010 4:08 PM EDT)
SAN FRANCISCO—Programmable logic vendor Xilinx Inc. continues to face the risk of double ordering by customers due to growing lead times for some of its parts, according to a Wall Street analyst.
Christopher Danely, an analyst at J.P. Morgan, noted in a report circulated Tuesday (May 18) that Xilinx (San Jose, Calif.) recently stated that lead times for some Virtex-5 FPGAs have extended to more than 10 weeks, above last quarter's range of four to six weeks. Danely said his firm also remains concerned about recent comments from Cisco Systems Corp. regarding inventory build in the communications supply chain.
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