SAN JOSE, Calif. The EDA industry must move quickly to close the gap between design tools and chip production capabilities to enable semiconductor companies to innovate, said Vassilios Gerousis, CAD system architect for Infineon Technologies AG, in a panel session at the EDA Front-to-Back Conference.
As the only tool user on the panel, Gerousis presented a wish list of what EDA vendors could do to make users' lives easier.
As process geometries shrink and IC gate counts increase, chip designers are having problems mainly in two areas: high-level design and physical verification, said Gerousis, who evaluates tool environments and develops methodologies for Infineon.
"We need to move to higher levels in abstraction to describe these large designs, but at the same time there are more physical effects such as crosstalk and inductance," he said. "EDA companies are helping, but not enough."
Tool vendors need to come up with products tha t close the design gap and allow users to better exploit silicon, close the predictability gap to shorten product cycle times, and close the productivity gap to improve the speed with which users complete products, Gerousis said.
Seeming to dig at vendors, Gerousis suggested a radical licensing model in which Infineon would pay EDA vendors for productivity improvements. Gerousis said Infineon would apply a productivity metric developed by Numetrics Management Systems Inc. to determine productivity before and after a design, then pay vendors based on the improvement.
The idea didn't appear too popular with the EDA vendors on the panel, who mostly avoided Gerousis' suggestion of a new model.
Vendor panelists instead focused on ways EDA can improve close the three gaps described by Gerousis. Ken McElvain, chief technology officer at Synplicity Inc., said there are a number of small fixes EDA vendors could make to improve productivity.
"Making tools simpler and faster has a short-term and an imm ediate effect on improving design time," said McElvain. "Lets face it, there are a lot of tools in this industry that simply make up for shortcomings of other tools."
Ajoy Bose, president and chief executive officer of Atrenta Inc., said the EDA industry has seen a long gap since the last true paradigm shift logic synthesis and is in desperate need of a new one.
While a pinnacle technology would benefit the company that develops it, as was the case with logic synthesis, it would also give birth to supporting tools from other vendors and drive up the value and visibility of the EDA industry, Bose said.
Panelists agree that the next jump in design abstraction could provide growth opportunity for the industry.
Call for innovation
In his presentation, Gerousis called for more innovation from EDA vendors, especially in system-level design. But he said he has been encouraged by academic efforts such as those at the Gigascale Research Center, which is looking at a numbe r of possible growth avenues, including system-level design.
"We want to work more closely with EDA companies so they can develop the tools we need," said Gerousis, whose company earlier this year at the Design Automation and Test in Europe conference threatened to build its own tools if EDA firms did not innovate.