NVM OTP in UMC (180nm, 153nm, 110nm, 90nm, 80nm, 55nm, 40nm, 28nm, 22nm)
EDA Consortium Reports Revenue Increase for Q1 2010
SAN JOSE, CA-- July 13, 2010 - The EDA Consortium (EDAC) Market Statistics Service (MSS) today announced that the Electronic Design Automation (EDA) industry revenue for Q1 2010 was $1247 million, a 4.6 percent increase compared to $1192.1 million in Q1 2009. Sequential EDA revenue declined 1.2 percent, while over the last four quarters it declined 5.9 percent.
"Led by increases in the CAE and Semiconductor IP categories, the EDAC revenue numbers show an increase over Q1 2009," said Wally Rhines, EDAC chair and chairman and CEO of Mentor Graphics. "Geographically, the Asia/Pacific region showed growth both year to year and quarter over quarter."
Companies that were tracked employed 26,099 professionals in Q1 2010, up 0.4 percent compared to Q4 2009, but down 1.7 percent from the 26,561employed in Q1 2009.
The complete MSS report, containing detailed revenue information broken out by both categories and geographic regions, is available via subscription from the EDA Consortium.
Revenue by Product Category
Computer Aided Engineering (CAE), EDA's largest category, generated revenue of $458.5 million in Q1 2010. This represents a 7.2 percent increase over the same period in 2009. Over the last four quarters, CAE declined 3.5 percent.
IC Physical Design & Verification revenue decreased to $274.4 million in Q1 2010, a 9.2 percent decrease compared to Q1 2009. Over the last four quarters, IC Physical Design & Verification declined 8.3 percent.
Printed Circuit Board and Multi-Chip Module (PCB & MCM) revenue decreased 8.8 percent compared to Q1 2009, to $109.4 million. Over the last four quarters, PCB & MCM decreased 8.9 percent.
Semiconductor Intellectual Property (SIP) revenue totaled $320.9 million in Q1 2010, a 35.8 percent increase compared to Q1 2009. Over the last four quarters, SIP decreased 0.1 percent.
Services revenue was $83.7 million in Q1 2010, a decrease of 20.7 percent compared to Q1 2009. Over the last four quarters, services decreased 21.7 percent.
Revenue by Consuming Region
The Americas, EDA's largest region, purchased $492.9 million of EDA products and services in Q1 2010, representing a decrease of 0.2 percent compared to Q1 2009. Over the last four quarters, the Americas were down 5.5 percent.
Revenue in Europe, the Middle East, and Africa (EMEA) was up 0.5 percent in Q1 2010 compared to Q1 2009 on revenues of $224.2 million. Over the last four quarters, EMEA was down 13.1 percent.
First quarter 2010 revenue from Japan decreased 1.9 percent to $250.8 million compared to Q1 2009. Over the last four quarters, Japan decreased 9.1 percent.
The Asia/Pacific (APAC) region increased to $279.0 million in Q1 2010, a 33.2 percent increase compared to the same quarter in 2009. Over the last four quarters, APAC increased 7.0 percent.
About the MSS Report
The EDA Consortium Market Statistics Service reports EDA industry revenue data quarterly and is available by annual subscription. Both public and private companies contribute data to the report. Each quarterly report is published approximately three months after quarter close. MSS report data is segmented as follows: revenue type (product licenses and maintenance, services, and SIP), application (CAE, PCB/MCM Layout, and IC Physical Design and Verification), and region (the Americas, Europe Middle East and Africa, Japan, and Asia Pacific), with many subcategories of detail provided. The report also tracks total employment of the reporting companies.
About the EDA Consortium
The EDA Consortium is the international association of companies that provide design tools and services that enable engineers to create the world's electronic products used for communications, computer, space technology, medical, automotive, industrial equipment, and consumer electronics markets among others. For more information about the EDA Consortium, visit www.edac.org, or to subscribe to the Market Statistics Service, call (408) 287-3322 or email mss10@edac.org.
|
Related News
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |