Belgrade, Serbia – July 22, 2010 – HDL Design House has announced HVT MX25L VITAL behavioral model, fully compliant to Macronix MX25L8006E, 8 Mbit CMOS Serial Flash Memory, REV.0.01, Jan 28,2010 specification. The MX25L8006E is a flash memory with standard serial interface, which supports standard 1xI/O and dual 2xI/O read, erase and program operations with power supply in 2.7V-3.6V range. This device is Serial Peripheral Interface compatible with Mode 0 and Mode 3. The memory is organized in 16 equal 64KB blocks, or 256 equal 4KB sectors, in order to enable individual block/sector erase.
HVT MX25L VITAL Behavioral Model Key Features:
- VHDL’93, Verilog and VITAL’2000 compliant
- Requires VITAL’2000 library for correct compilation
- Timing backannotation by means of SDF files
- Models are written at a behavioral level, do not reveal intellectual property, and are not synthesizable
The VITAL HVT MX25L behavioral model completely follows the operation capabilities of a real component. This implies complete functionality, delays between input signals and output signals and all timing requirements regarding input signals (setup and hold timings, pulse widths, etc.). Considering how important timing requirements are, this VITAL HVT MX25L behavioral model will detect and report a timing violation if constraints are not satisfied.
The VITAL HVT MX25L behavioral model includes a total of 20 instructions. All instructions are implemented in this behavioral model. Also, it includes 19 timing check procedures (setup and hold, pulse width and period timing checks).
The code is written in Verilog and the model is highly portable across a range of simulators.
The VITAL HVT MX25L behavioral model can be used in SoC/ASIC, system level or board-level verification. In a typical simulation environment, the device under test (DUT) is connected to the VITAL HVT MX25L Behavioral Model. The VITAL HVT MX25L behavioral model completely emulates functionality of real component and provides a possibility for testing a system that includes this component, and has shown timing violations when tested in unexpected situations.
The VITAL HVT MX25L model can be used along with HDL DH SPI flash memory controller IP core (HIP 3100). The HIP 3100 IP core is an advanced controller for SPI flash memories which off-loads host CPU from direct data transfer and control of SPI flash memory. The host CPU can program SPI controller (HIP 3100) specifying the type of data transfer (SPI instruction, address, data, data transfer size, etc.) and SPI controller (HIP 3100) executes requested transfer. More information about HIP 3100 be found on following link: http://www.hdl-dh.com/prodbroch/HIP3100.01.04.2009.pdf
VITAL behavioral models are products of close cooperation of HDL Design House (HDL DH) and Free Model Foundry (FMF) company. HDL DH and FMF have developed thousands of VITAL models. The VITAL model package consists of VHDL and Verilog source code, memory preload files (when appropriate), FTM and SDF files, test cases package file and documentation. The HVT MX25L model and other VITAL models are available for download free of charge from the FMF website (http://www.freemodelfoundry.com).
If you are interested in finding out more about the HVT MX25L VITAL model, please visit www.hdl-dh.com or download model source code from the following link: http://www.freemodelfoundry.com
About HDL Design House:
HDL Design House delivers leading-edge digital and analog, design and verification services and products in numerous areas of SoC and complex FPGA designs. The company develops IP cores and provides complete design and verification services for complex SoC projects. The company also delivers component (VITAL) models for major SoC product developers. Dedicated to fulfilling each customer's unique requirement, HDL Design House has established a reputation as a reliable partner with high-quality products and services, flexible licensing models, competitive pricing and responsible technical support. The company enables customers to concentrate on system-level work and be confident that the various system components have been fully and reliably engineered and tested.
Founded in 2001, HDL Design House has 60 employees in two design centers – in Belgrade and Cuprija (Serbia). The company was awarded ISO 9001:2000 and ISO 27001:2005 certifications in December 2006 and has achieved certifications from Direct Assessment Services (DAS), thereby meeting United Kingdom Accreditation Service (UKAS) regulatory requirements. With ISO 27001:2005 certification, the highest certification standard for information security available, HDL Design House becomes the first company in Serbia to comply with this standard. In 2006 the company was awarded the SME Exporter of the Year by Serbia Investment and Export Promotion Agency (SIEPA).
Founded in 1995, Free Model Foundry is dedicated to promoting standard modeling practices within the electrical engineering community. In particular, we support the use of VHDL, Verilog, and SystemVerilog modeling languages.
One service provided by FMF is to help IC and IP vendors increase the rate of adoption of their products by providing accurate, uniform, functional models to expedite evaluation and selection by designers of electronic systems. Our staff of experienced modeling engineers has developed models simulating over 11,000 parts and takes pride in the ease of use and accuracy of results its products offer.
Free Model Foundry (FMF) believes in free, open source distribution of simulation and analysis models of electronic components. It promotes the development, distribution and sharing of functional simulation models (with timing) for board level components and open source behavioral models for proprietary IP.