Break-through in the embedded Memory market with Dolphin Integration's dual port RAMs
Meylan, France – August 6, 2010. Dolphin’s Dual Port memories are embedding the access strip design technique, with a pending patent, resulting in two major innovations:
- The silicon area of Dolphin’s DpRAM is up to 50% denser than traditional DpRAM,
- Dolphin’s DpRAM offers a new functionality to SoC designers: the full asynchronous access.
Dolphin’s Dual Port memories satisfy any cost-conscious designer thanks to their area reduction capabilities:
- 50% denser than traditional dpRAM!
- Routing over instances starts from metal 4
- Free rotation at R0, R90, R180, R270
Dolphin’s Dual Port memories open up to a new System-level functionality:
Read and Write operations can be performed jointly at the same address on both ports, thus allowing a fully asynchronous access.
These Ultra High Density Dual Port memories are first released for the 130 nm technological process with flexibility from 128 bits up to 512 kbits.
Check up by yourself the performances of these DpRAM on your design: http://www.dolphin.fr/flip/ragtime/013/ragtime_013_ram.html
About Dolphin Integration
Dolphin Integration is up to their charter as the most adaptive creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation and Foundry independence. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components, resilient to noise and drastic for low power-consumption, together with engineering assistance and product evolutions customized to their needs. For more information about Dolphin, visit: www.dolphin.fr/ragtime
|
Dolphin Semiconductor Hot IP
Related News
- Dolphin Integration introduces new Dual Port memory compilers in TSMC 40 nm
- eWBM selects Dolphin Integration's Single port SRAM and thick oxide standard cell library at GF 55 LPx
- Dolphin Integration's breakthrough offering to spread Audio Codecs over AP and PMIC
- Dolphin Integration announces a break-through in logic design drastically improving performances
- Dolphin Integration highlights an innovative solution to improve drastically the performance of Embedded Flash memories
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |