Wilsonville, Ore. - Mentor Graphics Corp. has added a C language interface to its Seamless hardware/software co-verification environment that lets designers use mixed C/C++ and HDL descriptions for hardware. The interface, called C-Bridge, will be included with Seamless version 4.3, which is to be released in late March.
HDL simulation users today can bring in C code through the Verilog programming language interface (PLI) or VHDL foreign language interface (FLI), but C-Bridge supports faster performance and a higher level of abstraction, said Larry Anderson, director of marketing for the system-on-chip verification division at Mentor Graphics. He said the interface supports abstract reads and writes for bus connections, but can still be cycle-accurate.
"You could take all of the devices tied to the processor, write your entire design in C, and then start moving blocks into RTL as you imp lement them," Anderson said.
C-Bridge provides an applications programming interface (API). To use it, designers adapt their C language models to read and write through the API. They instantiate the models in Seamless, where they're dynamically loaded into instruction-set simulation (ISS). However, C-Bridge provides its own source-level debugging environment rather than using the ISS debugger.
C-Bridge imposes no limitations on C language code, and can be used with SystemC version 2.0 models. The Seamless 4.3 release, including C-Bridge, starts at $60,000 on Solaris, HP/UX and Linux platforms.