Sidense Achieves Record Results for FY2010
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation (Oct. 17, 2017)
Best year for bookings ever for fiscal year ending September 30, 2010
Ottawa, Canada – October 25, 2010 - Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, announced today that the Company has achieved record annual bookings for the fiscal year ending September 30, 2010. Furthermore, the Company’s Cumulative Annual Growth Rate (CAGR) from end of FY2008 to end of FY2010 was a robust 43.51%.
The 2010 fiscal year was very successful for Sidense in several ways. Along with record annual financial results, the Company had a strong fiscal fourth quarter. During this period, Sidense had design wins with several new Tier 1 customers, each with annual revenues of over $1B, and currently has a double-digit list of these prominent accounts. The Company also strengthened its position in fiscal fourth quarter in many key market segments and applications, including automotive, precision analog trimming, HDMI and other audio/video digital interfaces, and SuperSpeed USB 3.0 high-speed interfaces.
“FY2010 was an exceptional year for Sidense, both in our technology advances and in our customer engagements,” said Tom Schild, Sidense’s VP of Worldwide Sales. “We continue to be the leader in antifuse one-time programmable memory IP, with our patented 1T-Fuse™-based OTP products that have been used by more than 70 customers in over 120 designs.”
Based on a one-transistor (1T) bit cell, Sidense’s SiPROM, SLP and ULP memory IP macros provide customers with a one-time programmable (OTP), highly secure, very reliable and cost-effective storage solution that is a low-power alternative for many applications currently using traditional mask ROM, Flash and eFuse technologies. Field-programmable Sidense OTP macros provide a means of lengthening product lifetime and increasing product ROI.
About Sidense Corp.
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company’s innovative one-transistor 1T-Fuse™ architecture provides the industry’s smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.
Sidense SiPROM, SLP and ULP memory products, embedded in over 120 customer designs, are available from 180nm down to 40nm and are scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.
|
Related News
- Andes Technology Achieves Record Annual Revenue Amid Strong AI Demand
- Arm achieves record revenue and shipments in Q1 FY 2022
- Sidense Enjoys Record Fiscal Year 2013
- QuickLogic Reports Third Quarter Fiscal 2023 Results Including Record Non-GAAP Net Income
- M31 hit a record high of revenue and profit in last year, and it expects to sustain a double digit growth throughout the year
Breaking News
- Arteris Joins Intel Foundry Accelerator Ecosystem Alliance Program to Support Advanced Semiconductor Designs
- SkyeChip Joins Intel Foundry Accelerator IP Alliance
- Siemens and Intel Foundry advance their collaboration to enable cutting-edge integrated circuits and advanced packaging solutions for 2D and 3D IC
- Cadence Expands Design IP Portfolio Optimized for Intel 18A and Intel 18A-P Technologies, Advancing AI, HPC and Mobility Applications
- Synopsys and Intel Foundry Propel Angstrom-Scale Chip Designs on Intel 18A and Intel 18A-P Technologies
Most Popular
- QuickLogic Delivers eFPGA Hard IP for Intel 18A Based Test Chip
- Siemens collaborates with TSMC to drive further innovation in semiconductor design and integration
- Aion Silicon Joins Intel Foundry Accelerator Design Services Alliance to Deliver Next-Generation Custom SoCs at Scale
- TSMC Unveils Next-Generation A14 Process at North America Technology Symposium
- BOS Semiconductors to Partner with Intel to Accelerate Automotive AI Innovation
![]() |
E-mail This Article | ![]() |
![]() |
Printer-Friendly Page |