Sidense Files Action Against Kilopass Patents at USPTO
Update: Synopsys Expands DesignWare IP Portfolio with Acquisition of Sidense Corporation (Oct. 17, 2017)
Sidense asks United States Patent and Trademark Office to invalidate Kilopass 1T memory cell patents asserted against the Company
Ottawa, Canada – November 2, 2010 - Sidense Corp., a leading developer of Logic Non-Volatile Memory (LNVM) OTP IP cores, announced today that it has requested the United States Patent and Trademark Office (USPTO) to reexamine Kilopass U.S. Patent Nos. 6,777,757 and 6,856,540, each entitled "High Density Semiconductor Memory Cell and Memory Array using a Single Transistor," and rule that the claims of these patents are invalid.
"These re-examination actions are part of Sidense's ongoing program to vigorously protect and defend our patented, industry-leading 1T-Fuse™ architecture," said Xerxes Wania, Sidense President and CEO.
"Several months ago, Kilopass filed an action making vague and unfounded assertions that OTP memory arrays based on the Sidense architecture infringe these patents," said Mr. Wania. "While Kilopass has been so far unable or unwilling to explain how these arrays could possibly infringe, we have learned that, in granting these patents, the USPTO did not apply key prior art. Upon reexamination, we believe the USPTO will find these patents invalid over that prior art."
"When the patent examiner considered the Kilopass patent application, the patent examiner never applied the most relevant prior art - a Mohsen et al. patent assigned to Actel," said Wlodek Kurjanowicz, Sidense Chief Technical Officer. "Because of telltale similarities between the Kilopass technology and the Actel patent, and taking into account that inventor Jack Zezhong Peng appears to have worked at Actel before filing the Kilopass application, we believe these patents are principally based upon Actel technology and that the USPTO will rule them invalid."
About Sidense Corp.
Sidense Corp. provides secure, very dense and reliable non-volatile, one-time programmable (OTP) memory IP for use in standard-logic CMOS processes with no additional masks or process steps required and no impact on product yield. The Company's innovative one-transistor 1T-Fuse™ architecture provides the industry's smallest footprint, most reliable and lowest power Logic Non-Volatile Memory (NVM) IP solution. With over 70 patents granted or pending, Sidense OTP provides a field-programmable alternative solution to Flash, mask ROM and eFuse in many OTP and MTP applications.
Sidense OTP memory, embedded in over 120 customer designs, is available from 180nm down to 40nm and is scalable to 28nm and below. The IP is offered at and has been adopted by all top-tier semiconductor foundries and selected IDMs. Customers are using Sidense OTP for analog trimming, code storage, encryption keys such as HDCP, WHDI, RFID and Chip ID, medical, automotive, and configurable processors and logic. For more information, please visit www.sidense.com.
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