DOLPHIN Integration is completing its offering of Custom Training Products after a market test in Asia

Grenoble, France -- December 10, 2010 -- Both Dolphin Integration Chairman and their CTO are just back from business trips throughout China and Taiwan. Their intent was to exchange directly with users and external training partners on their new Custom Training Programs, which offer modeling know-how to secure the integration and application schematics of subsystems of silicon IP.

Gilles Depeyrot, CTO of Dolphin Integration indicates that “Our Application Hardware Modeling (AHM) methodology applied to the simulation of Application Schematics for subsystems has received the warmest of welcomes with positive feedback to enrich our offering. Our customers and partners are conscious that simulation of subsystems requires modeling know-how to take all sources of degradation into account”.

Custom Training Programs address integration issues at SoC level and at system level to cover a wide range of problematics from different subsystems, such as noise on power supply, regulator sizing, ESD protection, voltage reference specification, pop-up noise reduction, BoM optimization…

Application Engineers of Fabless SoC suppliers are now able to provide validated application schematics as design references to their own customers, whereas end-users have the capabilities to customize their own application schematics based on their specific optimization constraints: Bill-of-Materials, silicon area, performances…

For more information on the Custom Training Programs and the associated case studies, contact the product manager Nathalie Dufayard at solutions@dolphin-integration.com.

About Dolphin Integration

Dolphin Integration is up to their charter as the most adaptive and lasting creator in the Microelectronics Design Industry to "enable mixed signal Systems-on-Chip". It stars a quality management stimulating reactivity for innovation as well as independence and partnerships with Foundries. Their current mission is to supply worldwide customers with fault-free, high-yield and reliable sets of CMOS Virtual Components. The strategy is to follow product launches with evolutions addressing future needs, emphasizing resilience to noise and drastic reductions of power-consumption at SoC level, thanks to their own EDA solutions enabling Integration Hardware Modeling (IHM) and Application Hardware Modeling (AHM) as well as early Power and Noise assessment, plus engineering assistance for Risk Control.

For more information about Dolphin, visit: www.dolphin.fr/eda

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