1-112Gbps Medium Reach (MR) and Very Short Reach (VSR) SerDes
Intel has late metal fix for design error
Peter Clarke, EETimes
1/31/2011 6:12 PM EST
SANTA CLARA, Calif. – Some more details of a design error in a companion chip to the Sandy Bridge processor – and the fix being implemented – have emerged in a conference call held by Intel with financial analysts to discuss the issue and the impact on Intel's revenues and margins.
The chip, known as Series 6 or Cougar Point, passed rigorous functional testing performed by both Intel and its OEMs but nonetheless there is a problem which can show up in a low percentage of chips, according to Steve Smith, vice president of PC client operation enabling, speaking on the call.
E-mail This Article | Printer-Friendly Page |
Related News
Breaking News
- Keysight, Synopsys, and Ansys Deliver Radio Frequency Design Migration Flow to TSMC's N6RF+ Process Node
- Siemens collaborates with TSMC on design tool certifications for the foundry's newest processes and other enablement milestones
- Leveraging Cryogenics and Photonics for Quantum Computing
- Kalray Joins Arm Total Design, Extending Collaboration with Arm on Accelerated AI Processing
- Credo at TSMC 2024 North America Technology Symposium
Most Popular
- Huawei Mate 60 Pro processor made on SMIC 7nm N+2 process
- Silicon Creations Reaches Milestone of 10 Million Wafers in Production with TSMC
- GUC provides 3DIC ASIC total service package to AI/HPC/Networking customers
- Analog Bits to Demonstrate Numerous Test Chips Including Portfolio of Power Management and Embedded Clocking and High Accuracy Sensor IP in TSMC N3P Process at TSMC 2024 North America Technology Symposium
- Alphawave Semi: FY 2023 and 2024 YTD Trading Update and Notice of Results