Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface
Open-Silicon Releases Max Technology 2.0
MILPITAS, Calif. – February 15, 2011: Open-Silicon, Inc., a leading semiconductor design and manufacturing company, today announced the availability of MAX Technologies 2.0. This update to Open-Silicon’s MAX Technologies helps Open-Silicon best optimize silicon for power, performance and cost while also managing the process variability of today’s advanced CMOS nodes. Not only are power, performance, cost and variability major design challenges for 40nm and 28nm SoCs, but they also are the criteria by which great silicon is measured in the market. By using PowerMAX™, CoreMAX™, TestMAX™ and VariMAX™, Open-Silicon’s customers can enjoy competitive advantages in their marketplace.
For managing silicon variability and reducing leakage power, Open-Silicon offers VariMAX with back biasing. Open-Silicon’s 28nm development efforts have shown back biasing to be effective at dramatically reducing leakage power even with new high-K metal gate (HKMG) transistors. As low-power design moves to the mainstream, back biasing is becoming a critical technology for maximizing yields for high-volume mobile SoCs and managing power density for high-performance networking and computing silicon.
Open-Silicon offers PowerMAX for low-power design. In particular, Multi-Threshold CMOS (MTCMOS) has been used in many designs across multiple foundries. With MTCMOS, Open-Silicon has efficiently implemented block-level power gating using either header or footer cells as well as memory retention, state retention flops, level shifters, isolation cells and rush current analysis.
For high performance, Open-Silicon offers 28nm support for design-specific library augmentation, where Open-Silicon uses patented software to analyze the critical paths and design new library cells to improve performance. Think Physical™, another addition to the MAX Technologies line, helps designers create physically-optimized RTL by carefully and simultaneously modeling the design’s physical considerations. By outlining the entire design flow, from architecture all the way through to tape-out, before any code is written, team members can understand how the specific constraints of the architecture, technology, verification environment, synthesis flow and place and route flow mutually interact. This careful attention throughout the design process means overall design performance is maximized.
“As the industry moves toward a design-lite model, Open-Silicon is uniquely positioned to provide the derivative solutions our customers need,” said Colin Baldwin, director of marketing at Open-Silicon. “MAX Technologies 2.0 further enhances our capabilities to design and manufacture complex, custom silicon solutions, and builds our customer’s confidence that they are going to be supplying world-class silicon to these new derivative markets.”
About Open-Silicon, Inc.
Open-Silicon is a leading semiconductor company focused on SoC realization for traditional ASIC, develop-to-spec, and derivative ICs. In support of the industry trend towards collaborative engineering and design-lite, Open-Silicon offers SoC architecture, system design, physical design, low-level software, and high-quality semiconductor manufacturing services with one of the world’s broadest partner ecosystems for IC development. For more information, visit Open-Silicon’s website at www.open-silicon.com or call 408-240-5700.
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