Cadence VIP Adds Support for Third-Party Simulators, Incorporates Denali Strengths to Expand Capabilities and Add New Offerings
SAN JOSE, Calif. -- Feb 28, 2011 -- Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today detailed the extensive expansion of its broad portfolio of verification IP (VIP) and memory models, which delivers a robust verification solution spanning silicon, SoC and system development. The Cadence® VIP offering boasts support of new protocols such as ARM® AMBA® 4 and MIPI to address early IP verification and integration through to system validation in demonstration of the EDA360 vision. In addition to memory models and VIP obtained from last year’s acquisition of Denali®, complementing the metric-driven Cadence VIP, the expanded offering now supports all major third party simulators, effectively providing designers a one-stop shop of mainstream and emerging protocols for developing and verifying today’s advanced electronic designs.
“As a technology leader and global IP supplier, ARM sees firsthand that the complexity involved with designing today’s SoCs and systems is matched only by the complexity entailed with verifying them,” said Joe Convey, director of design enablement, ARM. “Our customers create the world’s most advanced products and depend on the latest verification technology to reduce risk and speed time to market. With its high-quality verification IP that spans leading protocols, such as the newly released AMBA 4 specification for efficient SoC and FPGA designs, Cadence delivers the breadth and depth engineers need to validate a wide scope of designs, from the mainstream to the most advanced technology available.”
Specifically focused on accelerating the verification process and product delivery, Cadence’s VIP Catalog covers more than 30 complex and emerging protocols and is included in an expanded VIP Catalog that features:
- Support for third-party simulators across the entire portfolio to enable all customers to deploy Cadence VIP on top of existing environments, and extended support of the Universal Verification Methodology (UVM)
- Expanded protocol availability, featuring early delivery of verification IP for emerging protocols such as the AMBA 4 specification, the latest MIPI protocols (M-PHY, DigRF and UniPro), PCI Express Gen 3, SuperSpeed USB, and Ethernet 40/100G, as well as new memory models including DDR4, LRDIMM, and Flash ONFI 3.0.
- New use models, including system validation with new accelerated VIP that addresses hardware/software integration and a new SoC Portfolio that makes SoC verification more cost effective, and a roadmap for extending the solution to enable software-driven verification, a new approach providing a programmer’s view of system verification.
“Xilinx excels in bringing ASIC-class capacity and performance to the ever-expanding FPGA market with support for the AMBA4 Advanced Extensible Interface (AXI4) on-chip interconnect,” said Rick Tomihiro, director of marketing, Semiconductor IP at Xilinx. “Cadence is helping us meet our customers’ need for advanced verification methodologies by supplying powerful VIP support for AMBA AXI4™ packaged in the easy-to-use Xilinx ISE tool suite.”
“Verification continues to dominate project schedules and costs, with companies expending tremendous efforts on IP and SoC verification and on ensuring system correctness,” said Nimish Modi, senior vice president of the System Realization Group at Cadence. “With our expanded VIP offering, customers now have access to a vast and comprehensive set of verification IP targeting IP, SoC and system development. Along with the enhanced features and capabilities of the portfolio, this helps our customers significantly improve their competitiveness through delivering higher quality products and accelerating time to volume.”
The overview of the new VIP Catalog, including a listing of specific protocols and new capabilities, is available at the Cadence Web site.
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software, IP and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
For more information, please contact:
Cadence Design Systems, Inc.
What Others Are Saying About Cadence Verification IP
“PCI-SIG®, with over 800 member companies, is the industry organization responsible for development and management of the PCI Express® specification. We are delighted that Cadence continues to facilitate rapid industry adoption of the PCI Express 3.0 architecture via its family of verification IP products.”
Al Yanes, president and chairman, PCI-SIG
“The MIPI Alliance of over 200 member companies develops interface specifications which drive consistency in processor and peripheral interfaces, promoting reuse and compatibility in mobile devices. As a longtime contributing member, Cadence has helped advance the evolution of the several MIPI protocols and their rapid adoption by IP and SoC companies.”
Joel Huloux, chairman of MIPI Alliance
“OCP-IP is dedicated to proliferating a common standard for intellectual property (IP) core interfaces that facilitate ‘plug and play’ SoC design. Cadence has been instrumental in advancing this standard via its VIP solutions that facilitate functional verification and formal analysis, thus enabling IP and SoC developers to accurately verify conformance to the standard and deliver high-quality components to their customers.”
Ian Mackintosh, president of OCP-IP